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reg_abi.hh
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27
28#ifndef __ARCH_ARM_REG_ABI_HH__
29#define __ARCH_ARM_REG_ABI_HH__
30
31#include <vector>
32
33#include "base/logging.hh"
34#include "sim/syscall_abi.hh"
35
36namespace gem5
37{
38
39namespace ArmISA
40{
41
43{
45};
46
48{
50};
51
52} // namespace ArmISA
53
54namespace guest_abi
55{
56
57template <typename ABI, typename Arg>
58struct Argument<ABI, Arg,
59 typename std::enable_if_t<
60 std::is_base_of_v<ArmISA::RegABI32, ABI> &&
61 std::is_integral_v<Arg> &&
62 ABI::template IsWideV<Arg>>>
63{
64 static Arg
65 get(ThreadContext *tc, typename ABI::State &state)
66 {
67 // 64 bit arguments are passed starting in an even register.
68 if (state % 2)
69 state++;
70 panic_if(state + 1 >= ABI::ArgumentRegs.size(),
71 "Ran out of syscall argument registers.");
72 auto low = ABI::ArgumentRegs[state++];
73 auto high = ABI::ArgumentRegs[state++];
74 return (Arg)ABI::mergeRegs(tc, low, high);
75 }
76};
77
78} // namespace guest_abi
79} // namespace gem5
80
81#endif // __ARCH_ARM_REG_ABI_HH__
ThreadContext is the external interface to all thread state for anything outside of the CPU.
STL vector class.
Definition stl.hh:37
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition logging.hh:214
atomic_var_t state
Definition helpers.cc:188
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Overload hash function for BasicBlockRange type.
Definition misc.hh:2910
static const std::vector< RegId > ArgumentRegs
Definition reg_abi.hh:44
static const std::vector< RegId > ArgumentRegs
Definition reg_abi.hh:49

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