cpuid.hh

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/*
 * Copyright (c) 2008 The Regents of The University of Michigan
 * All rights reserved.
 *
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 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
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 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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#ifndef __ARCH_X86_CPUID_HH__
#define __ARCH_X86_CPUID_HH__
 
#include "base/types.hh"
 
namespace gem5
{
 
class ThreadContext;
 
namespace X86ISA
{
    struct CpuidResult
    {
        uint64_t rax;
        uint64_t rbx;
        uint64_t rcx;
        uint64_t rdx;
 
        // These are not in alphebetical order on purpose. The order reflects
        // how the CPUID orders the registers when it returns results.
        CpuidResult(uint64_t _rax, uint64_t _rbx,
                    uint64_t _rdx, uint64_t _rcx) :
            rax(_rax), rbx(_rbx), rcx(_rcx), rdx(_rdx)
        {}
 
        CpuidResult()
        {}
    };
 
    uint64_t stringToRegister(const char *str);
 
    bool doCpuid(ThreadContext * tc, uint32_t function,
            uint32_t index, CpuidResult &result);
 
} // namespace X86ISA
} // namespace gem5
 
#endif