amdgpu_gfx.hh File Reference

#include "base/types.hh"
#include "mem/packet.hh"

Go to the source code of this file.

Classes
class	gem5::AMDGPUGfx

Namespaces
namespace	gem5
	Copyright (c) 2024 Arm Limited All rights reserved.

Macros
#define	AMDGPU_MM_RLC_GPU_CLOCK_COUNT_LSB   0x13090
	MMIO offsets for GFX.
#define	AMDGPU_MM_RLC_GPU_CLOCK_COUNT_MSB   0x13094
#define	AMDGPU_MM_RLC_CAPTURE_GPU_CLOCK_COUNT   0x13098
#define	AMDGPU_MM_SCRATCH_REG0   0x08100

Macro Definition Documentation

AMDGPU_MM_RLC_CAPTURE_GPU_CLOCK_COUNT

#define AMDGPU_MM_RLC_CAPTURE_GPU_CLOCK_COUNT   0x13098

Definition at line 53 of file amdgpu_gfx.hh.

AMDGPU_MM_RLC_GPU_CLOCK_COUNT_LSB

#define AMDGPU_MM_RLC_GPU_CLOCK_COUNT_LSB   0x13090

MMIO offsets for GFX.

This class handles MMIO reads/writes to the GFX_BASE aperture which are generally read/written by the gfx driver source here:

 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/master/ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

The MMIO addresses in the file are dword addresses. Here they are converted to byte addresses so gem5 does not need to shift the values.

Definition at line 51 of file amdgpu_gfx.hh.

AMDGPU_MM_RLC_GPU_CLOCK_COUNT_MSB

#define AMDGPU_MM_RLC_GPU_CLOCK_COUNT_MSB   0x13094

Definition at line 52 of file amdgpu_gfx.hh.

AMDGPU_MM_SCRATCH_REG0

#define AMDGPU_MM_SCRATCH_REG0   0x08100

Definition at line 56 of file amdgpu_gfx.hh.