cfi_mem.hh

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#ifndef __MEM_FLASH_MEM_HH__
#define __MEM_FLASH_MEM_HH__
 
#include "base/random.hh"
#include "mem/abstract_mem.hh"
#include "params/CfiMemory.hh"
 
namespace gem5
{
 
namespace memory
{
 
class CfiMemory : public AbstractMemory
{
  private:
    enum class CfiCommand
    {
        NO_CMD = 0,
        LOCK_BLOCK = 0x1,
        ERASE_BLOCK_SETUP = 0x20,
        WORD_PROGRAM = 0x40,
        CLEAR_STATUS_REG = 0x50,
        LOCK_BLOCK_SETUP = 0x60,
        READ_STATUS_REG = 0x70,
        READ_DEVICE_ID = 0x90,
        READ_CFI_QUERY = 0x98,
        BUFFERED_PROGRAM_SETUP = 0xE8,
        BUFFERED_PROGRAM_CONFIRM = 0xD0,
        BLOCK_ERASE_CONFIRM = 0xD0,
        UNLOCK_BLOCK = 0xD0,
        AMD_RESET=0xF0,
        READ_ARRAY = 0xFF,
        BUFFER_SIZE_READ,
    };
    enum class CfiCommand {…};
 
    static const uint8_t STATUS_ERASE_ERROR = 0x30;
    static const uint8_t STATUS_LOCK_ERROR = 0x12;
    static const uint8_t STATUS_READY = 0x80;
    static const uint8_t STATUS_PROGRAM_LOCK_BIT = 0x10;
 
    struct BlockData : public Serializable
    {
        BlockData(const CfiMemory &_parent, ssize_t number, ssize_t size)
          : Serializable(), locked(number, false), blockSize(size),
            parent(_parent)
        {}
        BlockData(const CfiMemory &_parent, ssize_t number, ssize_t size) {…}
 
        bool isLocked(Addr block_address) const;
 
        void lock(Addr block_address);
 
        void unlock(Addr block_address);
 
        void erase(PacketPtr pkt);
 
        ssize_t number() const { return locked.size(); }
 
        ssize_t size() const { return blockSize; }
 
      private: // Serializable
        void serialize(CheckpointOut &cp) const override;
 
        void unserialize(CheckpointIn &cp) override;
 
      private:
        uint32_t blockIdx(Addr block_address) const;
 
        // Per block flag. True if the block is locked
        std::vector<bool> locked;
 
        // Size of the block in bytes
        const ssize_t blockSize;
 
        const CfiMemory &parent;
    };
    struct BlockData : public Serializable {…};
 
    struct ProgramBuffer : public Serializable
    {
      public:
        // program buffer max size = 32 words
        static const ssize_t MAX_BUFFER_SIZE = 32 * 4;
 
        ProgramBuffer(const CfiMemory &_parent)
          : Serializable(), parent(_parent)
        {}
        ProgramBuffer(const CfiMemory &_parent) {…}
 
        void setup(ssize_t buffer_size);
 
        bool write(Addr flash_address, void *data_ptr, ssize_t size);
 
        bool writeback();
 
      private:
        void serialize(CheckpointOut &cp) const override;
 
        void unserialize(CheckpointIn &cp) override;
 
      private:
        // program buffer
        std::vector<uint8_t> buffer;
 
        // Number of bytes written in the buffer
        ssize_t bytesWritten = 0;
 
        // Pointing to the latest written word in the buffer
        Addr blockPointer = 0;
 
        const CfiMemory &parent;
    };
    struct ProgramBuffer : public Serializable {…};
 
    class DeferredPacket
    {
 
      public:
 
        const Tick tick;
        const PacketPtr pkt;
 
        DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
        { }
        DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt) {…}
    };
    class DeferredPacket {…};
 
    class MemoryPort : public ResponsePort
    {
      private:
        CfiMemory& mem;
 
      public:
        MemoryPort(const std::string& _name, CfiMemory& _memory);
 
      protected:
        Tick recvAtomic(PacketPtr pkt) override;
        Tick recvAtomicBackdoor(
                PacketPtr pkt, MemBackdoorPtr &_backdoor) override;
        void recvFunctional(PacketPtr pkt) override;
        void recvMemBackdoorReq(const MemBackdoorReq &req,
                MemBackdoorPtr &_backdoor) override;
        bool recvTimingReq(PacketPtr pkt) override;
        void recvRespRetry() override;
        AddrRangeList getAddrRanges() const override;
    };
    class MemoryPort : public ResponsePort {…};
 
    MemoryPort port;
 
    const Tick latency;
 
    const Tick latency_var;
 
    std::list<DeferredPacket> packetQueue;
 
    const double bandwidth;
 
    bool isBusy;
 
    bool retryReq;
 
    bool retryResp;
 
    void release();
 
    EventFunctionWrapper releaseEvent;
 
    void dequeue();
 
    EventFunctionWrapper dequeueEvent;
 
    Tick getLatency() const;
 
    std::unique_ptr<Packet> pendingDelete;
 
    const uint8_t numberOfChips;
 
    const uint16_t vendorID;
    const uint16_t deviceID;
    const uint16_t bankWidth;
 
    CfiCommand readState;
    CfiCommand writeState;
 
    uint8_t statusRegister;
 
    BlockData blocks;
 
    ProgramBuffer programBuffer;
 
    uint8_t cfiQueryTable[61];
 
    mutable Random::RandomPtr rng = Random::genRandom();
 
  public:
    CfiMemory(const CfiMemoryParams &p);
 
    DrainState drain() override;
 
    Port &getPort(const std::string &if_name,
                  PortID idx=InvalidPortID) override;
    void init() override;
 
    void serialize(CheckpointOut &cp) const override;
    void unserialize(CheckpointIn &cp) override;
 
  protected:
    Tick recvAtomic(PacketPtr pkt);
    Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &_backdoor);
    void recvFunctional(PacketPtr pkt);
    void recvMemBackdoorReq(const MemBackdoorReq &req,
            MemBackdoorPtr &_backdoor);
    bool recvTimingReq(PacketPtr pkt);
    void recvRespRetry();
 
    void cfiAccess(PacketPtr pkt);
 
    void write(PacketPtr pkt);
 
    void read(PacketPtr pkt);
 
    uint64_t readDeviceID(Addr flash_address) const;
 
    void handleCommand(CfiCommand command);
 
    uint64_t cfiQuery(Addr addr);
};
class CfiMemory : public AbstractMemory {…};
 
} // namespace memory
} // namespace gem5
 
#endif