controller.hh

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/*
 * Copyright (c) 2023 ARM Limited
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 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
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 * modified or unmodified, in source code or in binary form.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
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 * neither the name of the copyright holders nor the names of its
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 * this software without specific prior written permission.
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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#ifndef __MEM_RUBY_PROTOCOL_CHI_TLM_CONTROLLER_HH__
#define __MEM_RUBY_PROTOCOL_CHI_TLM_CONTROLLER_HH__
 
#include <ARM/TLM/arm_chi.h>
 
#include "mem/ruby/protocol/chi/generic/CHIGenericController.hh"
#include "mem/ruby/protocol/CHI/CHIDataType.hh"
#include "mem/ruby/protocol/CHI/CHIRequestType.hh"
#include "mem/ruby/protocol/CHI/CHIResponseType.hh"
#include "mem/ruby/protocol/RequestStatus.hh"
#include "mem/ruby/protocol/WriteMask.hh"
#include "params/TlmController.hh"
 
namespace gem5 {
 
namespace ruby {
class CHIRequestMsg;
class CHIResponseMsg;
class CHIDataMsg;
}
 
namespace tlm::chi {
 
class CacheController : public ruby::CHIGenericController
{
  public:
    PARAMS(TlmController);
    CacheController(const Params &p);
 
    std::function<void(ARM::CHI::Payload* payload, ARM::CHI::Phase* phase)> bw;
 
    bool recvRequestMsg(const CHIRequestMsg *msg) override;
    bool recvSnoopMsg(const CHIRequestMsg *msg) override;
    bool recvResponseMsg(const CHIResponseMsg *msg) override;
    bool recvDataMsg(const CHIDataMsg *msg) override;
 
    void sendMsg(ARM::CHI::Payload &payload, ARM::CHI::Phase &phase);
    using CHIGenericController::sendRequestMsg;
    void sendRequestMsg(ARM::CHI::Payload &payload, ARM::CHI::Phase &phase);
    using CHIGenericController::sendResponseMsg;
    void sendResponseMsg(ARM::CHI::Payload &payload, ARM::CHI::Phase &phase);
    void sendCompAck(ARM::CHI::Payload &payload, ARM::CHI::Phase &phase);
    using CHIGenericController::sendDataMsg;
    void sendDataMsg(ARM::CHI::Payload &payload, ARM::CHI::Phase &phase);
 
    Addr reqAddr(ARM::CHI::Payload &payload, ARM::CHI::Phase &phase) const;
    Addr reqSize(ARM::CHI::Payload &payload, ARM::CHI::Phase &phase) const;
 
    void pCreditGrant(const CHIResponseMsg *msg);
 
    struct Transaction
    {
        enum class Type
        {
            READ,
            WRITE,
            DATALESS
        };
        enum class Type {…};
 
        Transaction(CacheController *parent,
            ARM::CHI::Payload &_payload,
            ARM::CHI::Phase &_phase);
        ~Transaction();
 
        static std::unique_ptr<Transaction> gen(CacheController *parent,
            ARM::CHI::Payload &_payload,
            ARM::CHI::Phase &_phase);
 
        virtual bool
        handle(const CHIDataMsg *msg)
        {
            panic("Unimplemented");
        }
        handle(const CHIDataMsg *msg) {…}
 
        virtual bool handle(const CHIResponseMsg *msg);
 
        CacheController *controller;
        ARM::CHI::Payload *payload;
        ARM::CHI::Phase phase;
    };
    struct Transaction {…};
    struct ReadTransaction : public Transaction
    {
        using Transaction::Transaction;
        bool handle(const CHIDataMsg *msg) override;
        bool handle(const CHIResponseMsg *msg) override;
        bool forward(const CHIDataMsg *msg);
 
        uint8_t dataMsgCnt = 0;
    };
    struct ReadTransaction : public Transaction {…};
    struct DatalessTransaction : public Transaction
    {
        using Transaction::Transaction;
        bool handle(const CHIResponseMsg *msg) override;
    };
    struct DatalessTransaction : public Transaction {…};
    struct WriteTransaction : public Transaction
    {
        using Transaction::Transaction;
        bool handle(const CHIResponseMsg *msg) override;
        bool recvComp = false;
        bool recvDBID = false;
    };
    struct WriteTransaction : public Transaction {…};
    std::unordered_map<uint16_t, std::unique_ptr<Transaction>> pendingTransactions;
};
class CacheController : public ruby::CHIGenericController {…};
 
} // namespace tlm::chi
 
} // namespace gem5
 
#endif // __MEM_RUBY_PROTOCOL_CHI_TLM_CONTROLLER_HH__