gem5::ArmISA::TLBIMVAA Class Reference

TLB Invalidate by VA, All ASID. More...

#include <tlbi_op.hh>

Inheritance diagram for gem5::ArmISA::TLBIMVAA:

Public Member Functions
	TLBIMVAA (TranslationRegime _target_regime, SecurityState _ss, Addr _addr, bool last_level, Attr _attr=Attr::None)
void	operator() (ThreadContext *tc) override
bool	matchEntry (TlbEntry *entry, vmid_t curr_vmid) const override
Public Member Functions inherited from gem5::ArmISA::TLBIOp
	TLBIOp (TranslationRegime _target_regime, SecurityState _ss, Attr _attr)
virtual	~TLBIOp ()
void	broadcast (ThreadContext *tc)
	Broadcast the TLB Invalidate operation to all TLBs in the Arm system.
bool	match (TlbEntry *entry, vmid_t curr_vmid) const
virtual bool	stage1Flush () const
	Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class.
virtual bool	stage2Flush () const
	Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class.

Public Attributes
Addr	addr
bool	lastLevel
Public Attributes inherited from gem5::ArmISA::TLBIOp
SecurityState	ss
TranslationRegime	targetRegime
Attr	attr

Protected Member Functions
TlbEntry::KeyType	lookupGen (vmid_t vmid) const

Additional Inherited Members
Public Types inherited from gem5::ArmISA::TLBIOp
enum class	Attr { None , ExcludeXS }

Detailed Description

TLB Invalidate by VA, All ASID.

Definition at line 279 of file tlbi_op.hh.

Constructor & Destructor Documentation

TLBIMVAA()

gem5::ArmISA::TLBIMVAA::TLBIMVAA ( TranslationRegime _target_regime, SecurityState _ss, Addr _addr, bool last_level, Attr _attr = Attr::None )

inline

Definition at line 284 of file tlbi_op.hh.

References addr, lastLevel, gem5::ArmISA::TLBIOp::None, and gem5::ArmISA::TLBIOp::TLBIOp().

Referenced by gem5::ArmISA::TLBIRMVAA::TLBIRMVAA().

Member Function Documentation

lookupGen()

TlbEntry::KeyType gem5::ArmISA::TLBIMVAA::lookupGen ( vmid_t vmid ) const

protected

Definition at line 210 of file tlbi_op.cc.

References addr, gem5::ArmISA::TLBTypes::KeyType::functional, gem5::ArmISA::TLBTypes::KeyType::ignoreAsn, gem5::ArmISA::TLBTypes::KeyType::mode, gem5::BaseMMU::Read, gem5::sext(), gem5::ArmISA::TLBIOp::ss, gem5::ArmISA::TLBTypes::KeyType::ss, gem5::ArmISA::TLBIOp::targetRegime, gem5::ArmISA::TLBTypes::KeyType::targetRegime, gem5::ArmISA::TLBTypes::KeyType::va, and gem5::ArmISA::TLBTypes::KeyType::vmid.

Referenced by matchEntry(), and gem5::ArmISA::TLBIRMVAA::matchEntry().

matchEntry()

bool gem5::ArmISA::TLBIMVAA::matchEntry ( TlbEntry * entry, vmid_t curr_vmid ) const

overridevirtual

Implements gem5::ArmISA::TLBIOp.

Reimplemented in gem5::ArmISA::TLBIRMVAA.

Definition at line 235 of file tlbi_op.cc.

References lastLevel, lookupGen(), and gem5::ArmISA::te.

operator()()

void gem5::ArmISA::TLBIMVAA::operator() ( ThreadContext * tc )

overridevirtual

Reimplemented from gem5::ArmISA::TLBIOp.

Definition at line 224 of file tlbi_op.cc.

References gem5::ArmISA::MMU::flushStage1(), gem5::ThreadContext::getCheckerCpuPtr(), and gem5::ArmISA::getMMUPtr().

Member Data Documentation

addr

Addr gem5::ArmISA::TLBIMVAA::addr

Definition at line 294 of file tlbi_op.hh.

Referenced by lookupGen(), and TLBIMVAA().

lastLevel

bool gem5::ArmISA::TLBIMVAA::lastLevel

Definition at line 295 of file tlbi_op.hh.

Referenced by matchEntry(), gem5::ArmISA::TLBIRMVAA::matchEntry(), and TLBIMVAA().

---

The documentation for this class was generated from the following files:

• arch/arm/tlbi_op.hh
• arch/arm/tlbi_op.cc