#include <vgic.hh>

Inheritance diagram for gem5::VGic:

Public Types
using	Params = VGicParams

Public Types inherited from gem5::PioDevice
using	Params = PioDeviceParams

Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject.

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Public Member Functions
	VGic (const Params &p)

	~VGic ()

AddrRangeList	getAddrRanges () const override
	Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

Tick	read (PacketPtr pkt) override
	Pure virtual function that the device must implement.

Tick	write (PacketPtr pkt) override
	Pure virtual function that the device must implement.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::PioDevice
	PioDevice (const Params &p)

virtual	~PioDevice ()

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index.

Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbePoints ()
	Register probe points for this object.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

virtual void	startup ()
	startup() is the final initialization call before simulation.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

virtual void	notifyFork ()
	Notify a child process of a fork.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters.

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (std::string_view name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick.

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge.

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Private Member Functions
void	processPostVIntEvent (uint32_t cpu)
	Post interrupt to CPU.

	BitUnion32 (ListReg) Bitfield< 31 > HW

	EndBitUnion (ListReg) BitUnion32(HCR) Bitfield< 31

	EndBitUnion (HCR) BitUnion32(VCTLR) Bitfield< 9 > EOImode

Tick	readVCpu (PacketPtr pkt)

Tick	readCtrl (PacketPtr pkt)

Tick	writeVCpu (PacketPtr pkt)

Tick	writeCtrl (PacketPtr pkt)

void	updateIntState (ContextID ctx_id)

uint32_t	getMISR (struct vcpuIntData *vid)

void	postVInt (uint32_t cpu, Tick when)

void	unPostVInt (uint32_t cpu)

void	postMaintInt (uint32_t cpu)

void	unPostMaintInt (uint32_t cpu)

unsigned int	lrPending (struct vcpuIntData *vid)

unsigned int	lrValid (struct vcpuIntData *vid)

int	findHighestPendingLR (struct vcpuIntData *vid)
	Returns LR index or -1 if none pending.

int	findLRForVIRQ (struct vcpuIntData *vid, int virq, int vcpu)

Private Attributes
const uint32_t	gicvIIDR

EventFunctionWrapper *	postVIntEvent [VGIC_CPU_MAX]

bool	maintIntPosted [VGIC_CPU_MAX]

bool	vIntPosted [VGIC_CPU_MAX]

Platform *	platform

BaseGic *	gic

Addr	vcpuAddr

Addr	hvAddr

Tick	pioDelay

int	maintInt

Bitfield< 30 >	Grp1

Bitfield< 29, 28 >	State

Bitfield< 27, 23 >	Priority

Bitfield< 19 >	EOI

Bitfield< 12, 10 >	CpuID

Bitfield< 9, 0 >	VirtualID

	EOICount

Bitfield< 7 >	VGrp1DIE

Bitfield< 6 >	VGrp1EIE

Bitfield< 5 >	VGrp0DIE

Bitfield< 4 >	VGrp0EIE

Bitfield< 3 >	NPIE

Bitfield< 2 >	LRENPIE

Bitfield< 1 >	UIE

Bitfield< 0 >	En

Bitfield< 4 >	CPBR

Bitfield< 3 >	FIQEn

Bitfield< 2 >	AckCtl

Bitfield< 1 >	EnGrp1

EndBitUnion(VCTLR) struct vcpuIntData struct std::array< vcpuIntData, VGIC_CPU_MAX >	vcpuData

Static Private Attributes
static const int	VGIC_CPU_MAX = 256

static const int	NUM_LR = 4

static const int	GICH_SIZE = 0x200

static const int	GICH_REG_SIZE = 0x2000

static const int	GICH_HCR = 0x000

static const int	GICH_VTR = 0x004

static const int	GICH_VMCR = 0x008

static const int	GICH_MISR = 0x010

static const int	GICH_EISR0 = 0x020

static const int	GICH_EISR1 = 0x024

static const int	GICH_ELSR0 = 0x030

static const int	GICH_ELSR1 = 0x034

static const int	GICH_APR0 = 0x0f0

static const int	GICH_LR0 = 0x100

static const int	GICH_LR1 = 0x104

static const int	GICH_LR2 = 0x108

static const int	GICH_LR3 = 0x10c

static const int	GICV_SIZE = 0x2000

static const int	GICV_CTLR = 0x000

static const int	GICV_PMR = 0x004

static const int	GICV_BPR = 0x008

static const int	GICV_IAR = 0x00c

static const int	GICV_EOIR = 0x010

static const int	GICV_RPR = 0x014

static const int	GICV_HPPIR = 0x018

static const int	GICV_ABPR = 0x01c

static const int	GICV_AIAR = 0x020

static const int	GICV_AEOIR = 0x024

static const int	GICV_AHPPIR = 0x028

static const int	GICV_APR0 = 0x0d0

static const int	GICV_IIDR = 0x0fc

static const int	GICV_DIR = 0x1000

static const uint32_t	LR_PENDING = 1

static const uint32_t	LR_ACTIVE = 2

Additional Inherited Members
Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain.

void	signalDrainDone () const
	Signal that an object is drained.

Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters.

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance.

void	resetClock () const
	Reset the object's clock using the current global tick value.

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.

Protected Attributes inherited from gem5::PioDevice
System *	sys

PioPort< PioDevice >	pioPort
	The pioPort that handles the requests for us and provides us requests that it sees.

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Detailed Description

Definition at line 65 of file vgic.hh.

Member Typedef Documentation

◆ Params

using gem5::VGic::Params = VGicParams

Definition at line 192 of file vgic.hh.

Constructor & Destructor Documentation

◆ VGic()

gem5::VGic::VGic ( const Params & p )

Definition at line 52 of file vgic.cc.

References gic, gicvIIDR, hvAddr, maintInt, maintIntPosted, gem5::MipsISA::p, pioDelay, gem5::PioDevice::PioDevice(), platform, postVIntEvent, processPostVIntEvent(), gem5::PioDevice::sys, vcpuAddr, VGIC_CPU_MAX, vIntPosted, and gem5::RiscvISA::x.

◆ ~VGic()

gem5::VGic::~VGic ( )

Definition at line 67 of file vgic.cc.

References postVIntEvent, VGIC_CPU_MAX, and gem5::RiscvISA::x.

Member Function Documentation

◆ BitUnion32()

gem5::VGic::BitUnion32 ( ListReg )

private

Referenced by EndBitUnion().

◆ EndBitUnion() [1/2]

gem5::VGic::EndBitUnion ( HCR )

private

References BitUnion32(), and EndBitUnion().

◆ EndBitUnion() [2/2]

gem5::VGic::EndBitUnion ( ListReg )

private

Referenced by EndBitUnion().

◆ findHighestPendingLR()

int gem5::VGic::findHighestPendingLR ( struct vcpuIntData * vid )

inlineprivate

Returns LR index or -1 if none pending.

Definition at line 238 of file vgic.hh.

References gem5::ArmISA::i, LR_PENDING, NUM_LR, and gem5::MipsISA::p.

Referenced by readVCpu().

◆ findLRForVIRQ()

int gem5::VGic::findLRForVIRQ	(	struct vcpuIntData *	vid,
		int	virq,
		int	vcpu )

inlineprivate

Definition at line 251 of file vgic.hh.

References gem5::ArmISA::i, and NUM_LR.

Referenced by writeVCpu().

◆ getAddrRanges()

AddrRangeList gem5::VGic::getAddrRanges ( ) const

overridevirtual

Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

Returns: a list of non-overlapping address ranges

Implements gem5::PioDevice.

Definition at line 454 of file vgic.cc.

References GICH_REG_SIZE, GICV_SIZE, hvAddr, gem5::RangeSize(), and vcpuAddr.

◆ getMISR()

uint32_t gem5::VGic::getMISR ( struct vcpuIntData * vid )

private

Definition at line 354 of file vgic.cc.

References lrPending(), and lrValid().

Referenced by readCtrl(), and updateIntState().

◆ lrPending()

unsigned int gem5::VGic::lrPending ( struct vcpuIntData * vid )

inlineprivate

Definition at line 218 of file vgic.hh.

References gem5::ArmISA::i, LR_PENDING, and NUM_LR.

Referenced by getMISR(), and updateIntState().

◆ lrValid()

unsigned int gem5::VGic::lrValid ( struct vcpuIntData * vid )

inlineprivate

Definition at line 227 of file vgic.hh.

References gem5::ArmISA::i, and NUM_LR.

Referenced by getMISR().

◆ postMaintInt()

void gem5::VGic::postMaintInt ( uint32_t cpu )

private

Definition at line 391 of file vgic.cc.

References DPRINTF, gic, and maintInt.

Referenced by updateIntState().

◆ postVInt()

void gem5::VGic::postVInt	(	uint32_t	cpu,
		Tick	when )

private

Definition at line 367 of file vgic.cc.

References DPRINTF, gem5::EventManager::eventq, and postVIntEvent.

Referenced by updateIntState().

◆ processPostVIntEvent()

void gem5::VGic::processPostVIntEvent ( uint32_t cpu )

private

Post interrupt to CPU.

Definition at line 383 of file vgic.cc.

References gem5::ArmISA::INT_VIRT_IRQ, and platform.

Referenced by VGic().

◆ read()

Tick gem5::VGic::read ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 74 of file vgic.cc.

References gem5::X86ISA::addr, gem5::Packet::getAddr(), GICH_REG_SIZE, GICV_SIZE, hvAddr, panic, readCtrl(), readVCpu(), and vcpuAddr.

◆ readCtrl()

Tick gem5::VGic::readCtrl ( PacketPtr pkt )

private

Definition at line 147 of file vgic.cc.

References DPRINTF, gem5::Packet::getAddr(), getMISR(), GICH_APR0, GICH_EISR0, GICH_EISR1, GICH_ELSR0, GICH_ELSR1, GICH_HCR, GICH_LR0, GICH_LR1, GICH_LR2, GICH_LR3, GICH_MISR, GICH_VMCR, GICH_VTR, hvAddr, gem5::ArmISA::i, gem5::Packet::makeAtomicResponse(), NUM_LR, panic, pioDelay, gem5::Packet::req, gem5::Packet::setLE(), vcpuData, VGIC_CPU_MAX, and warn_once.

Referenced by read().

◆ readVCpu()

Tick gem5::VGic::readVCpu ( PacketPtr pkt )

private

Definition at line 100 of file vgic.cc.

References DPRINTF, findHighestPendingLR(), gem5::Packet::getAddr(), GICV_CTLR, GICV_IAR, GICV_IIDR, gicvIIDR, gem5::ArmISA::i, LR_ACTIVE, gem5::Packet::makeAtomicResponse(), panic, pioDelay, gem5::Packet::req, gem5::Packet::setLE(), updateIntState(), vcpuAddr, vcpuData, and VGIC_CPU_MAX.

Referenced by read().

◆ serialize()

void gem5::VGic::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 463 of file vgic.cc.

References gem5::csprintf(), DPRINTF, hvAddr, maintInt, maintIntPosted, pioDelay, postVIntEvent, SERIALIZE_ARRAY, SERIALIZE_SCALAR, gem5::Serializable::serializeSection(), vcpuAddr, vcpuData, VGIC_CPU_MAX, and vIntPosted.

◆ unPostMaintInt()

void gem5::VGic::unPostMaintInt ( uint32_t cpu )

private

Definition at line 399 of file vgic.cc.

References DPRINTF, gic, and maintInt.

Referenced by updateIntState().

◆ unPostVInt()

void gem5::VGic::unPostVInt ( uint32_t cpu )

private

Definition at line 375 of file vgic.cc.

References DPRINTF, gem5::ArmISA::INT_VIRT_IRQ, and platform.

Referenced by updateIntState().

◆ unserialize()

void gem5::VGic::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 521 of file vgic.cc.

References gem5::csprintf(), DPRINTF, hvAddr, maintInt, maintIntPosted, pioDelay, postVIntEvent, gem5::EventManager::schedule(), UNSERIALIZE_ARRAY, UNSERIALIZE_SCALAR, vcpuAddr, vcpuData, VGIC_CPU_MAX, and vIntPosted.

◆ updateIntState()

void gem5::VGic::updateIntState ( ContextID ctx_id )

private

Definition at line 409 of file vgic.cc.

References gem5::curTick(), getMISR(), gem5::ArmISA::i, lrPending(), maintIntPosted, NUM_LR, postMaintInt(), postVInt(), gem5::PioDevice::sys, unPostMaintInt(), unPostVInt(), vcpuData, VGIC_CPU_MAX, and vIntPosted.

Referenced by readVCpu(), writeCtrl(), and writeVCpu().

◆ write()

Tick gem5::VGic::write ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 87 of file vgic.cc.

References gem5::X86ISA::addr, gem5::Packet::getAddr(), GICH_REG_SIZE, GICV_SIZE, hvAddr, panic, vcpuAddr, writeCtrl(), and writeVCpu().

◆ writeCtrl()

Tick gem5::VGic::writeCtrl ( PacketPtr pkt )

private

Definition at line 290 of file vgic.cc.

References gem5::ArmISA::d, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getLE(), GICH_APR0, GICH_HCR, GICH_LR0, GICH_LR1, GICH_LR2, GICH_LR3, GICH_VMCR, hvAddr, gem5::Packet::makeAtomicResponse(), panic, pioDelay, gem5::Packet::req, updateIntState(), vcpuData, VGIC_CPU_MAX, and warn_once.

Referenced by write().

◆ writeVCpu()

Tick gem5::VGic::writeVCpu ( PacketPtr pkt )

private

Definition at line 241 of file vgic.cc.

References DPRINTF, findLRForVIRQ(), gem5::Packet::getAddr(), gem5::Packet::getLE(), GICV_CTLR, GICV_EOIR, GICV_PMR, gem5::ArmISA::i, gem5::Packet::makeAtomicResponse(), panic, pioDelay, gem5::Packet::req, updateIntState(), vcpuAddr, vcpuData, VGIC_CPU_MAX, and gem5::MipsISA::w.

Referenced by write().

Member Data Documentation

◆ AckCtl

Bitfield<2> gem5::VGic::AckCtl

private

Definition at line 149 of file vgic.hh.

◆ CPBR

Bitfield<4> gem5::VGic::CPBR

private

Definition at line 147 of file vgic.hh.

◆ CpuID

Bitfield<12,10> gem5::VGic::CpuID

private

Definition at line 129 of file vgic.hh.

◆ En

Bitfield< 0 > gem5::VGic::En

private

Definition at line 142 of file vgic.hh.

◆ EnGrp1

Bitfield<1> gem5::VGic::EnGrp1

private

Definition at line 150 of file vgic.hh.

◆ EOI

Bitfield<19> gem5::VGic::EOI

private

Definition at line 128 of file vgic.hh.

◆ EOICount

gem5::VGic::EOICount

private

Definition at line 134 of file vgic.hh.

◆ FIQEn

Bitfield<3> gem5::VGic::FIQEn

private

Definition at line 148 of file vgic.hh.

◆ gic

BaseGic* gem5::VGic::gic

private

Definition at line 116 of file vgic.hh.

Referenced by postMaintInt(), unPostMaintInt(), and VGic().

◆ GICH_APR0

const int gem5::VGic::GICH_APR0 = 0x0f0

staticprivate

Definition at line 82 of file vgic.hh.

Referenced by readCtrl(), and writeCtrl().

◆ GICH_EISR0

const int gem5::VGic::GICH_EISR0 = 0x020

staticprivate

Definition at line 78 of file vgic.hh.

Referenced by readCtrl().

◆ GICH_EISR1

const int gem5::VGic::GICH_EISR1 = 0x024

staticprivate

Definition at line 79 of file vgic.hh.

Referenced by readCtrl().

◆ GICH_ELSR0

const int gem5::VGic::GICH_ELSR0 = 0x030

staticprivate

Definition at line 80 of file vgic.hh.

Referenced by readCtrl().

◆ GICH_ELSR1

const int gem5::VGic::GICH_ELSR1 = 0x034

staticprivate

Definition at line 81 of file vgic.hh.

Referenced by readCtrl().

◆ GICH_HCR

const int gem5::VGic::GICH_HCR = 0x000

staticprivate

Definition at line 74 of file vgic.hh.

Referenced by readCtrl(), and writeCtrl().

◆ GICH_LR0

const int gem5::VGic::GICH_LR0 = 0x100

staticprivate

Definition at line 83 of file vgic.hh.

Referenced by readCtrl(), and writeCtrl().

◆ GICH_LR1

const int gem5::VGic::GICH_LR1 = 0x104

staticprivate

Definition at line 84 of file vgic.hh.

Referenced by readCtrl(), and writeCtrl().

◆ GICH_LR2

const int gem5::VGic::GICH_LR2 = 0x108

staticprivate

Definition at line 85 of file vgic.hh.

Referenced by readCtrl(), and writeCtrl().

◆ GICH_LR3

const int gem5::VGic::GICH_LR3 = 0x10c

staticprivate

Definition at line 86 of file vgic.hh.

Referenced by readCtrl(), and writeCtrl().

◆ GICH_MISR

const int gem5::VGic::GICH_MISR = 0x010

staticprivate

Definition at line 77 of file vgic.hh.

Referenced by readCtrl().

◆ GICH_REG_SIZE

const int gem5::VGic::GICH_REG_SIZE = 0x2000

staticprivate

Definition at line 72 of file vgic.hh.

Referenced by getAddrRanges(), read(), and write().

◆ GICH_SIZE

const int gem5::VGic::GICH_SIZE = 0x200

staticprivate

Definition at line 71 of file vgic.hh.

◆ GICH_VMCR

const int gem5::VGic::GICH_VMCR = 0x008

staticprivate

Definition at line 76 of file vgic.hh.

Referenced by readCtrl(), and writeCtrl().

◆ GICH_VTR

const int gem5::VGic::GICH_VTR = 0x004

staticprivate

Definition at line 75 of file vgic.hh.

Referenced by readCtrl().

◆ GICV_ABPR

const int gem5::VGic::GICV_ABPR = 0x01c

staticprivate

Definition at line 96 of file vgic.hh.

◆ GICV_AEOIR

const int gem5::VGic::GICV_AEOIR = 0x024

staticprivate

Definition at line 98 of file vgic.hh.

◆ GICV_AHPPIR

const int gem5::VGic::GICV_AHPPIR = 0x028

staticprivate

Definition at line 99 of file vgic.hh.

◆ GICV_AIAR

const int gem5::VGic::GICV_AIAR = 0x020

staticprivate

Definition at line 97 of file vgic.hh.

◆ GICV_APR0

const int gem5::VGic::GICV_APR0 = 0x0d0

staticprivate

Definition at line 100 of file vgic.hh.

◆ GICV_BPR

const int gem5::VGic::GICV_BPR = 0x008

staticprivate

Definition at line 91 of file vgic.hh.

◆ GICV_CTLR

const int gem5::VGic::GICV_CTLR = 0x000

staticprivate

Definition at line 89 of file vgic.hh.

Referenced by readVCpu(), and writeVCpu().

◆ GICV_DIR

const int gem5::VGic::GICV_DIR = 0x1000

staticprivate

Definition at line 102 of file vgic.hh.

◆ GICV_EOIR

const int gem5::VGic::GICV_EOIR = 0x010

staticprivate

Definition at line 93 of file vgic.hh.

Referenced by writeVCpu().

◆ GICV_HPPIR

const int gem5::VGic::GICV_HPPIR = 0x018

staticprivate

Definition at line 95 of file vgic.hh.

◆ GICV_IAR

const int gem5::VGic::GICV_IAR = 0x00c

staticprivate

Definition at line 92 of file vgic.hh.

Referenced by readVCpu().

◆ GICV_IIDR

const int gem5::VGic::GICV_IIDR = 0x0fc

staticprivate

Definition at line 101 of file vgic.hh.

Referenced by readVCpu().

◆ GICV_PMR

const int gem5::VGic::GICV_PMR = 0x004

staticprivate

Definition at line 90 of file vgic.hh.

Referenced by writeVCpu().

◆ GICV_RPR

const int gem5::VGic::GICV_RPR = 0x014

staticprivate

Definition at line 94 of file vgic.hh.

◆ GICV_SIZE

const int gem5::VGic::GICV_SIZE = 0x2000

staticprivate

Definition at line 88 of file vgic.hh.

Referenced by getAddrRanges(), read(), and write().

◆ gicvIIDR

const uint32_t gem5::VGic::gicvIIDR

private

Definition at line 106 of file vgic.hh.

Referenced by readVCpu(), and VGic().

◆ Grp1

Bitfield<30> gem5::VGic::Grp1

private

Definition at line 125 of file vgic.hh.

◆ hvAddr

Addr gem5::VGic::hvAddr

private

Definition at line 119 of file vgic.hh.

Referenced by getAddrRanges(), read(), readCtrl(), serialize(), unserialize(), VGic(), write(), and writeCtrl().

◆ LR_ACTIVE

const uint32_t gem5::VGic::LR_ACTIVE = 2

staticprivate

Definition at line 105 of file vgic.hh.

Referenced by readVCpu().

◆ LR_PENDING

const uint32_t gem5::VGic::LR_PENDING = 1

staticprivate

Definition at line 104 of file vgic.hh.

Referenced by findHighestPendingLR(), and lrPending().

◆ LRENPIE

Bitfield<2> gem5::VGic::LRENPIE

private

Definition at line 140 of file vgic.hh.

◆ maintInt

int gem5::VGic::maintInt

private

Definition at line 121 of file vgic.hh.

Referenced by postMaintInt(), serialize(), unPostMaintInt(), unserialize(), and VGic().

◆ maintIntPosted

bool gem5::VGic::maintIntPosted[VGIC_CPU_MAX]

private

Definition at line 112 of file vgic.hh.

Referenced by serialize(), unserialize(), updateIntState(), and VGic().

◆ NPIE

Bitfield<3> gem5::VGic::NPIE

private

Definition at line 139 of file vgic.hh.

◆ NUM_LR

const int gem5::VGic::NUM_LR = 4

staticprivate

Definition at line 69 of file vgic.hh.

Referenced by findHighestPendingLR(), findLRForVIRQ(), lrPending(), lrValid(), readCtrl(), and updateIntState().

◆ pioDelay

Tick gem5::VGic::pioDelay

private

Definition at line 120 of file vgic.hh.

Referenced by readCtrl(), readVCpu(), serialize(), unserialize(), VGic(), writeCtrl(), and writeVCpu().

◆ platform

Platform* gem5::VGic::platform

private

Definition at line 115 of file vgic.hh.

Referenced by processPostVIntEvent(), unPostVInt(), and VGic().

◆ postVIntEvent

EventFunctionWrapper* gem5::VGic::postVIntEvent[VGIC_CPU_MAX]

private

Definition at line 111 of file vgic.hh.

Referenced by postVInt(), serialize(), unserialize(), VGic(), and ~VGic().

◆ Priority

Bitfield<27,23> gem5::VGic::Priority

private

Definition at line 127 of file vgic.hh.

◆ State

Bitfield<29,28> gem5::VGic::State

private

Definition at line 126 of file vgic.hh.

◆ UIE

Bitfield<1> gem5::VGic::UIE

private

Definition at line 141 of file vgic.hh.

◆ vcpuAddr

Addr gem5::VGic::vcpuAddr

private

Definition at line 118 of file vgic.hh.

Referenced by getAddrRanges(), read(), readVCpu(), serialize(), unserialize(), VGic(), write(), and writeVCpu().

◆ vcpuData

EndBitUnion (VCTLR) struct vcpuIntData struct std::array< vcpuIntData, VGIC_CPU_MAX > gem5::VGic::vcpuData

private

Definition at line 189 of file vgic.hh.

Referenced by readCtrl(), readVCpu(), serialize(), unserialize(), updateIntState(), writeCtrl(), and writeVCpu().

◆ VGIC_CPU_MAX

const int gem5::VGic::VGIC_CPU_MAX = 256

staticprivate

Definition at line 68 of file vgic.hh.

Referenced by readCtrl(), readVCpu(), serialize(), unserialize(), updateIntState(), VGic(), writeCtrl(), writeVCpu(), and ~VGic().

◆ VGrp0DIE

Bitfield<5> gem5::VGic::VGrp0DIE

private

Definition at line 137 of file vgic.hh.

◆ VGrp0EIE

Bitfield<4> gem5::VGic::VGrp0EIE

private

Definition at line 138 of file vgic.hh.

◆ VGrp1DIE

Bitfield<7> gem5::VGic::VGrp1DIE

private

Definition at line 135 of file vgic.hh.

◆ VGrp1EIE

Bitfield<6> gem5::VGic::VGrp1EIE

private

Definition at line 136 of file vgic.hh.

◆ vIntPosted

bool gem5::VGic::vIntPosted[VGIC_CPU_MAX]

private

Definition at line 113 of file vgic.hh.

Referenced by serialize(), unserialize(), updateIntState(), and VGic().

◆ VirtualID

Bitfield<9,0> gem5::VGic::VirtualID

private

Definition at line 130 of file vgic.hh.

The documentation for this class was generated from the following files:

dev/arm/vgic.hh
dev/arm/vgic.cc

Public Types

Public Member Functions

Private Member Functions

Private Attributes

Static Private Attributes

Additional Inherited Members

Detailed Description

Member Typedef Documentation

◆ Params

Constructor & Destructor Documentation

◆ VGic()

◆ ~VGic()

Member Function Documentation

◆ BitUnion32()

◆ EndBitUnion() [1/2]

◆ EndBitUnion() [2/2]

◆ findHighestPendingLR()

◆ findLRForVIRQ()

◆ getAddrRanges()

◆ getMISR()

◆ lrPending()

◆ lrValid()

◆ postMaintInt()

◆ postVInt()

◆ processPostVIntEvent()

◆ read()

◆ readCtrl()

◆ readVCpu()

◆ serialize()

◆ unPostMaintInt()

◆ unPostVInt()

◆ unserialize()

◆ updateIntState()

◆ write()

◆ writeCtrl()

◆ writeVCpu()

Member Data Documentation

◆ AckCtl

◆ CPBR

◆ CpuID

◆ En

◆ EnGrp1

◆ EOI

◆ EOICount

◆ FIQEn

◆ gic

◆ GICH_APR0

◆ GICH_EISR0

◆ GICH_EISR1

◆ GICH_ELSR0

◆ GICH_ELSR1

◆ GICH_HCR

◆ GICH_LR0

◆ GICH_LR1

◆ GICH_LR2

◆ GICH_LR3

◆ GICH_MISR

◆ GICH_REG_SIZE

◆ GICH_SIZE

◆ GICH_VMCR

◆ GICH_VTR

◆ GICV_ABPR

◆ GICV_AEOIR

◆ GICV_AHPPIR

◆ GICV_AIAR

◆ GICV_APR0

◆ GICV_BPR

◆ GICV_CTLR

◆ GICV_DIR

◆ GICV_EOIR

◆ GICV_HPPIR

◆ GICV_IAR

◆ GICV_IIDR

◆ GICV_PMR

◆ GICV_RPR

◆ GICV_SIZE

◆ gicvIIDR

◆ Grp1

◆ hvAddr

◆ LR_ACTIVE