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rename.hh
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1/*
2 * Copyright (c) 2012, 2017, 2025 Arm Limited
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4 *
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11 * unmodified and in its entirety in all distributions of the software,
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13 *
14 * Copyright (c) 2004-2006 The Regents of The University of Michigan
15 * Copyright (c) 2013 Advanced Micro Devices, Inc.
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40 */
41
42#ifndef __CPU_O3_RENAME_HH__
43#define __CPU_O3_RENAME_HH__
44
45#include <list>
46#include <utility>
47
48#include "base/statistics.hh"
49#include "cpu/o3/comm.hh"
50#include "cpu/o3/commit.hh"
52#include "cpu/o3/free_list.hh"
53#include "cpu/o3/iew.hh"
54#include "cpu/o3/limits.hh"
55#include "cpu/timebuf.hh"
56#include "sim/probe/probe.hh"
57
58namespace gem5
59{
60
61struct BaseO3CPUParams;
62
63namespace o3
64{
65
78class Rename
79{
80 public:
81 // A deque is used to queue the instructions. Barrier insts must
82 // be added to the front of the queue, which is the only reason for
83 // using a deque instead of a queue. (Most other stages use a
84 // queue)
86
87 public:
96
109
110 private:
113
116
126
127 public:
129 Rename(CPU *_cpu, const BaseO3CPUParams &params);
130
132 std::string name() const;
133
135 void regProbePoints();
136
139
142
145
147 void setIEWStage(IEW *iew_stage) { iew_ptr = iew_stage; }
148
150 void
151 setCommitStage(Commit *commit_stage)
152 {
153 commit_ptr = commit_stage;
154 }
155
156 private:
159
162
163 public:
165 void startupStage();
166
168 void clearStates(ThreadID tid);
169
172
175
177 void setFreeList(UnifiedFreeList *fl_ptr);
178
180 void setScoreboard(Scoreboard *_scoreboard);
181
183 void drainSanityCheck() const;
184
186 bool isDrained() const;
187
189 void takeOverFrom();
190
192 void squash(const InstSeqNum &squash_seq_num, ThreadID tid);
193
197 void tick();
198
200 void dumpHistory();
201
202 private:
204 void resetStage();
205
211 void rename(bool &status_change, ThreadID tid);
212
216 void renameInsts(ThreadID tid);
217
221 void skidInsert(ThreadID tid);
222
226 void sortInsts();
227
229 bool skidsEmpty();
230
232 void updateStatus();
233
238 bool block(ThreadID tid);
239
244 bool unblock(ThreadID tid);
245
247 void doSquash(const InstSeqNum &squash_seq_num, ThreadID tid);
248
250 void removeFromHistory(InstSeqNum inst_seq_num, ThreadID tid);
251
253 void renameSrcRegs(const DynInstPtr &inst, ThreadID tid);
254
256 void renameDestRegs(const DynInstPtr &inst, ThreadID tid);
257
260
263
266
269
271 unsigned validInsts();
272
274 void readStallSignals(ThreadID tid);
275
277 bool checkStall(ThreadID tid);
278
280 void readFreeEntries(ThreadID tid);
281
284
292 void serializeAfter(InstQueue &inst_list, ThreadID tid);
293
299 {
300 RenameHistory(InstSeqNum _instSeqNum, const RegId& _archReg,
301 PhysRegIdPtr _newPhysReg,
302 PhysRegIdPtr _prevPhysReg)
303 : instSeqNum(_instSeqNum), archReg(_archReg),
304 newPhysReg(_newPhysReg), prevPhysReg(_prevPhysReg)
305 {
306 }
307
317 };
318
323
326
329
332
335
338
341
344
347
350
353
356
359
362
365
368
371
376
381
386
391
396 {
397 unsigned iqEntries;
398 unsigned robEntries;
399 unsigned lqEntries;
400 unsigned sqEntries;
401 };
402
407
413
415 struct Stalls
416 {
417 bool iew;
418 bool commit;
419 };
420
423
426
431
434
437
440
442 unsigned renameWidth;
443
447 unsigned toIEWIndex;
448
451
455
459
462
465
477
481 void incrFullStat(const FullSource &source);
482
537};
538
539} // namespace o3
540} // namespace gem5
541
542#endif // __CPU_O3_RENAME_HH__
ProbePointArg generates a point for the class of Arg.
Definition probe.hh:273
Register ID: describe an architectural register with its class and index.
Definition reg_class.hh:94
O3CPU class, has each of the stages (fetch through commit) within it, as well as all of the time buff...
Definition cpu.hh:97
Commit handles single threaded and SMT commit.
Definition commit.hh:92
IEW handles both single threaded and SMT IEW (issue/execute/writeback).
Definition iew.hh:88
DynInstPtr serializeInst[MaxThreads]
The serialize instruction that rename has stalled on.
Definition rename.hh:425
void incrFullStat(const FullSource &source)
Function used to increment the stat that corresponds to the source of the stall.
Definition rename.cc:1421
ThreadID numThreads
The number of threads active in rename.
Definition rename.hh:461
TimeBuffer< RenameStruct >::wire toIEW
Wire to write any information heading to IEW.
Definition rename.hh:343
void sortInsts()
Separates instructions from decode into individual lists of instructions sorted by thread.
Definition rename.cc:820
void setCommitStage(Commit *commit_stage)
Sets pointer to commit stage.
Definition rename.hh:151
ThreadStatus renameStatus[MaxThreads]
Per-thread status.
Definition rename.hh:115
Rename(CPU *_cpu, const BaseO3CPUParams &params)
Rename constructor.
Definition rename.cc:82
TimeBuffer< TimeStruct >::wire toDecode
Wire to write infromation heading to previous stages.
Definition rename.hh:337
TimeBuffer< RenameStruct > * renameQueue
Rename instruction queue.
Definition rename.hh:340
unsigned commitToRenameDelay
Delay between commit and rename, in ticks.
Definition rename.hh:439
int storesInProgress[MaxThreads]
Count of Store instructions in progress that have been sent off to the IQ and ROB,...
Definition rename.hh:385
ThreadStatus
Individual thread status.
Definition rename.hh:99
int instsInProgress[MaxThreads]
Count of instructions in progress that have been sent off to the IQ and ROB, but are not yet included...
Definition rename.hh:375
int calcFreeIQEntries(ThreadID tid)
Calculates the number of free IQ entries for a specific thread.
Definition rename.cc:1170
void startupStage()
Initializes variables for the stage.
Definition rename.cc:242
ProbePointArg< DynInstPtr > * ppRename
To probe when register renaming for an instruction is complete.
Definition rename.hh:120
bool blockThisCycle
Whether or not rename needs to block this cycle.
Definition rename.hh:450
void renameSrcRegs(const DynInstPtr &inst, ThreadID tid)
Renames the source registers of an instruction.
Definition rename.cc:1032
void doSquash(const InstSeqNum &squash_seq_num, ThreadID tid)
Executes actual squash, removing squashed instructions.
Definition rename.cc:928
void renameDestRegs(const DynInstPtr &inst, ThreadID tid)
Renames the destination registers of an instruction.
Definition rename.cc:1105
unsigned skidBufferMax
The maximum skid buffer size.
Definition rename.hh:464
std::list< ThreadID > * activeThreads
Pointer to the list of active threads.
Definition rename.hh:367
UnifiedFreeList * freeList
Free list interface.
Definition rename.hh:361
void tick()
Ticks rename, which processes all input signals and attempts to rename as many instructions as possib...
Definition rename.cc:426
void readFreeEntries(ThreadID tid)
Gets the number of free entries for a specific thread.
Definition rename.cc:1260
std::deque< DynInstPtr > InstQueue
Definition rename.hh:85
int calcFreeROBEntries(ThreadID tid)
Calculates the number of free ROB entries for a specific thread.
Definition rename.cc:1159
int iewToRenameDelay
Delay between iew and rename, in ticks.
Definition rename.hh:433
RenameStatus _status
Rename status.
Definition rename.hh:112
void renameInsts(ThreadID tid)
Renames instructions for the given thread.
Definition rename.cc:535
void setFreeList(UnifiedFreeList *fl_ptr)
Sets pointer to the free list.
Definition rename.cc:330
std::pair< InstSeqNum, PhysRegIdPtr > SeqNumRegPair
Probe points.
Definition rename.hh:118
bool emptyROB[MaxThreads]
Records if the ROB is empty.
Definition rename.hh:412
void rename(bool &status_change, ThreadID tid)
Determines what to do based on rename's current status.
Definition rename.cc:480
TimeBuffer< TimeStruct >::wire fromIEW
Wire to get IEW's output from backwards time buffer.
Definition rename.hh:331
std::vector< PhysRegIdPtr > freeingInProgress[MaxThreads]
Hold phys regs to be released after squash finish.
Definition rename.hh:364
std::string name() const
Returns the name of rename.
Definition rename.cc:113
std::list< RenameHistory > historyBuffer[MaxThreads]
A per-thread list of all destination register renames, used to either undo rename mappings or free ol...
Definition rename.hh:322
TimeBuffer< DecodeStruct >::wire fromDecode
Wire to get decode's output from decode queue.
Definition rename.hh:349
void serializeAfter(InstQueue &inst_list, ThreadID tid)
Either serializes on the next instruction available in the InstQueue, or records that it must seriali...
Definition rename.cc:1408
gem5::o3::Rename::RenameStats stats
TimeBuffer< DecodeStruct > * decodeQueue
Decode instruction queue interface.
Definition rename.hh:346
unsigned renameWidth
Rename width, in instructions.
Definition rename.hh:442
void setRenameMap(UnifiedRenameMap::PerThreadUnifiedRenameMap &rm_ptr)
Sets pointer to rename maps (per-thread structures).
Definition rename.cc:323
void setIEWStage(IEW *iew_stage)
Sets pointer to IEW stage.
Definition rename.hh:147
bool resumeUnblocking
Whether or not rename needs to resume clearing out the skidbuffer after squashing.
Definition rename.hh:458
InstQueue skidBuffer[MaxThreads]
Skid buffer between rename and decode.
Definition rename.hh:355
Scoreboard * scoreboard
Pointer to the scoreboard.
Definition rename.hh:370
void drainSanityCheck() const
Perform sanity checks after a drain.
Definition rename.cc:362
bool skidsEmpty()
Returns if all of the skid buffers are empty.
Definition rename.cc:831
IEW * iew_ptr
Pointer to IEW stage.
Definition rename.hh:158
int calcFreeSQEntries(ThreadID tid)
Calculates the number of free SQ entries for a specific thread.
Definition rename.cc:1194
void dumpHistory()
Debugging function used to dump history buffer of renamings.
Definition rename.cc:1443
FullSource
Enum to record the source of a structure full stall.
Definition rename.hh:470
UnifiedRenameMap * renameMap[MaxThreads]
Rename map interface.
Definition rename.hh:358
bool block(ThreadID tid)
Switches rename to blocking, and signals back that rename has become blocked.
Definition rename.cc:875
int loadsInProgress[MaxThreads]
Count of Load instructions in progress that have been sent off to the IQ and ROB, but are not yet inc...
Definition rename.hh:380
TimeBuffer< TimeStruct >::wire fromCommit
Wire to get commit's output from backwards time buffer.
Definition rename.hh:334
bool unblock(ThreadID tid)
Switches rename to unblocking if the skid buffer is empty, and signals back that rename has unblocked...
Definition rename.cc:908
TimeBuffer< TimeStruct > * timeBuffer
Pointer to main time buffer used for backwards communication.
Definition rename.hh:328
unsigned toIEWIndex
The index of the instruction in the time buffer to IEW that rename is currently using.
Definition rename.hh:447
RenameStatus
Overall rename status.
Definition rename.hh:92
void removeFromHistory(InstSeqNum inst_seq_num, ThreadID tid)
Removes a committed instruction's rename history.
Definition rename.cc:976
void setTimeBuffer(TimeBuffer< TimeStruct > *tb_ptr)
Sets the main backwards communication time buffer pointer.
Definition rename.cc:209
void takeOverFrom()
Takes over from another CPU's thread.
Definition rename.cc:356
Stalls stalls[MaxThreads]
Tracks which stages are telling decode to stall.
Definition rename.hh:422
void regProbePoints()
Registers probes.
Definition rename.cc:200
void setActiveThreads(std::list< ThreadID > *at_ptr)
Sets pointer to list of active threads.
Definition rename.cc:316
void resetStage()
Reset this pipeline stage.
Definition rename.cc:285
bool checkStall(ThreadID tid)
Checks if any stages are telling rename to block.
Definition rename.cc:1232
InstQueue insts[MaxThreads]
Queue of all instructions coming from decode this cycle.
Definition rename.hh:352
void skidInsert(ThreadID tid)
Inserts unused instructions from a given thread into the skid buffer, to be renamed once rename unblo...
Definition rename.cc:787
void readStallSignals(ThreadID tid)
Reads signals telling rename to block/unblock.
Definition rename.cc:1219
void updateStatus()
Updates overall rename status based on all of the threads' statuses.
Definition rename.cc:842
bool checkSignalsAndUpdate(ThreadID tid)
Checks the signals and updates the status.
Definition rename.cc:1297
void squash(const InstSeqNum &squash_seq_num, ThreadID tid)
Squashes all instructions in a thread.
Definition rename.cc:373
bool isDrained() const
Has the stage drained?
Definition rename.cc:342
void setScoreboard(Scoreboard *_scoreboard)
Sets pointer to the scoreboard.
Definition rename.cc:336
FreeEntries freeEntries[MaxThreads]
Per-thread tracking of the number of free entries of back-end structures.
Definition rename.hh:406
int calcFreeLQEntries(ThreadID tid)
Calculates the number of free LQ entries for a specific thread.
Definition rename.cc:1181
Commit * commit_ptr
Pointer to commit stage.
Definition rename.hh:161
bool serializeOnNextInst[MaxThreads]
Records if rename needs to serialize on the next instruction for any thread.
Definition rename.hh:430
ProbePointArg< SeqNumRegPair > * ppSquashInRename
To probe when an instruction is squashed and the register mapping for it needs to be undone.
Definition rename.hh:125
int decodeToRenameDelay
Delay between decode and rename, in ticks.
Definition rename.hh:436
CPU * cpu
Pointer to CPU.
Definition rename.hh:325
void clearStates(ThreadID tid)
Clear all thread-specific states.
Definition rename.cc:248
bool wroteToTimeBuffer
Variable that tracks if decode has written to the time buffer this cycle.
Definition rename.hh:390
void setDecodeQueue(TimeBuffer< DecodeStruct > *dq_ptr)
Sets pointer to time buffer coming from decode.
Definition rename.cc:233
bool resumeSerialize
Whether or not rename needs to resume a serialize instruction after squashing.
Definition rename.hh:454
void setRenameQueue(TimeBuffer< RenameStruct > *rq_ptr)
Sets pointer to time buffer used to communicate to the next stage.
Definition rename.cc:224
unsigned validInsts()
Returns the number of valid instructions coming from decode.
Definition rename.cc:1206
Implements a simple scoreboard to track which registers are ready.
Definition scoreboard.hh:55
FreeList class that simply holds the list of free integer and floating point registers.
Definition free_list.hh:125
Unified register rename map for all classes of registers.
std::array< UnifiedRenameMap, MaxThreads > PerThreadUnifiedRenameMap
Statistics container.
Definition group.hh:93
This is a simple scalar statistic, like a counter.
A vector of scalar stats.
STL deque class.
Definition stl.hh:44
STL list class.
Definition stl.hh:51
STL pair class.
Definition stl.hh:58
STL vector class.
Definition stl.hh:37
static constexpr int MaxThreads
Definition limits.hh:38
RefCountingPtr< DynInst > DynInstPtr
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
int16_t ThreadID
Thread index/ID type.
Definition types.hh:235
PhysRegId * PhysRegIdPtr
Definition reg_class.hh:511
uint64_t InstSeqNum
Definition inst_seq.hh:40
Declaration of Statistics objects.
Structures whose free entries impact the amount of instructions that can be renamed.
Definition rename.hh:396
RenameHistory(InstSeqNum _instSeqNum, const RegId &_archReg, PhysRegIdPtr _newPhysReg, PhysRegIdPtr _prevPhysReg)
Definition rename.hh:300
InstSeqNum instSeqNum
The sequence number of the instruction that renamed.
Definition rename.hh:309
RegId archReg
The architectural register index that was renamed.
Definition rename.hh:311
PhysRegIdPtr newPhysReg
The new physical register that the arch.
Definition rename.hh:313
PhysRegIdPtr prevPhysReg
The old physical register that the arch.
Definition rename.hh:316
statistics::Scalar matLookups
Definition rename.hh:520
statistics::Scalar ROBFullEvents
Stat for total number of times that the ROB starts a stall in rename.
Definition rename.hh:499
statistics::Scalar renamedOperands
Stat for total number of renamed destination registers.
Definition rename.hh:513
statistics::Scalar fpLookups
Definition rename.hh:517
statistics::Scalar fullRegistersEvents
Stat for total number of times that rename runs out of free registers to use to rename.
Definition rename.hh:511
statistics::Scalar fpReturned
Number of registers freed and written back to floating point free list.
Definition rename.hh:535
statistics::Scalar squashedInsts
Stat for total number of squashed instructions that rename discards.
Definition rename.hh:496
statistics::Scalar IQFullEvents
Stat for total number of times that the IQ starts a stall in rename.
Definition rename.hh:502
statistics::Scalar vecPredLookups
Definition rename.hh:519
static std::string statusDefinitions[ThreadStatusMax]
Definition rename.hh:486
statistics::Scalar intReturned
Number of registers freed and written back to integer free list.
Definition rename.hh:533
statistics::Scalar renamedInsts
Stat for total number of renamed instructions.
Definition rename.hh:493
statistics::Scalar LQFullEvents
Stat for total number of times that the LQ starts a stall in rename.
Definition rename.hh:505
statistics::Scalar lookups
Stat for total number of source register rename lookups.
Definition rename.hh:515
statistics::Scalar vecLookups
Definition rename.hh:518
statistics::Vector status
Stat for total number of cycles spent in each rename state.
Definition rename.hh:491
statistics::Scalar tempSerializing
Number of instructions marked as temporarily serializing.
Definition rename.hh:529
statistics::Scalar serializing
Number of serialize instructions handled.
Definition rename.hh:527
statistics::Scalar undoneMaps
Stat for total number of mappings that were undone due to a squash.
Definition rename.hh:525
static std::string statusStrings[ThreadStatusMax]
Definition rename.hh:485
statistics::Scalar committedMaps
Stat for total number of committed renaming mappings.
Definition rename.hh:522
statistics::Scalar intLookups
Definition rename.hh:516
RenameStats(statistics::Group *parent)
Definition rename.cc:118
statistics::Scalar SQFullEvents
Stat for total number of times that the SQ starts a stall in rename.
Definition rename.hh:508
statistics::Scalar skidInsts
Number of instructions inserted into skid buffers.
Definition rename.hh:531
Source of possible stalls.
Definition rename.hh:416

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