gem5 [DEVELOP-FOR-25.1]
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rv_ctrl.hh
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1/*
2 * Copyright (c) 2010,2013,2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __DEV_ARM_RV_HH__
39#define __DEV_ARM_RV_HH__
40
41#include "base/bitunion.hh"
42#include "dev/io_device.hh"
43
47
48namespace gem5
49{
50
51struct RealViewCtrlParams;
52struct RealViewOscParams;
53struct RealViewTemperatureSensorParams;
54
56{
57 public:
73
74 class Device
75 {
76 public:
78 uint8_t site, uint8_t pos, uint8_t dcc, uint16_t dev)
79 {
80 parent.registerDevice(func, site, pos, dcc, dev, this);
81 }
82
83 virtual ~Device() {}
84
85 virtual uint32_t read() const = 0;
86 virtual void write(uint32_t value) = 0;
87 };
88
89 protected:
90 enum
91 {
92 IdReg = 0x00,
93 SwReg = 0x04,
94 Led = 0x08,
95 Osc0 = 0x0C,
96 Osc1 = 0x10,
97 Osc2 = 0x14,
98 Osc3 = 0x18,
99 Osc4 = 0x1C,
100 Lock = 0x20,
101 Clock100 = 0x24,
102 CfgData1 = 0x28,
103 CfgData2 = 0x2C,
104 Flags = 0x30,
105 FlagsClr = 0x34,
106 NvFlags = 0x38,
108 ResetCtl = 0x40,
109 PciCtl = 0x44,
110 MciCtl = 0x48,
111 Flash = 0x4C,
112 Clcd = 0x50,
113 ClcdSer = 0x54,
114 Bootcs = 0x58,
115 Clock24 = 0x5C,
116 Misc = 0x60,
117 IoSel = 0x70,
118 ProcId0 = 0x84,
119 ProcId1 = 0x88,
120 CfgData = 0xA0,
121 CfgCtrl = 0xA4,
122 CfgStat = 0xA8,
123 TestOsc0 = 0xC0,
124 TestOsc1 = 0xC4,
125 TestOsc2 = 0xC8,
126 TestOsc3 = 0xCC,
127 TestOsc4 = 0xD0
128 };
129
130 // system lock value
131 BitUnion32(SysLockReg)
132 Bitfield<15,0> lockVal;
133 Bitfield<16> locked;
134 EndBitUnion(SysLockReg)
135
136 BitUnion32(CfgCtrlReg)
137 Bitfield<11, 0> dev;
138 Bitfield<15, 12> pos;
139 Bitfield<17, 16> site;
140 Bitfield<25, 20> func;
141 Bitfield<29, 26> dcc;
142 Bitfield<30> wr;
143 Bitfield<31> start;
144 EndBitUnion(CfgCtrlReg)
145
146 static const uint32_t CFG_CTRL_ADDR_MASK = 0x3fffffffUL;
147
148 SysLockReg sysLock;
149
155 uint32_t flags;
156
159 uint32_t scData;
160
161 public:
163
168 RealViewCtrl(const Params &p);
169
175 Tick read(PacketPtr pkt) override;
176
182 Tick write(PacketPtr pkt) override;
183
184 void serialize(CheckpointOut &cp) const override;
185 void unserialize(CheckpointIn &cp) override;
186
187 public:
188 void registerDevice(DeviceFunc func, uint8_t site, uint8_t pos,
189 uint8_t dcc, uint16_t dev,
190 Device *handler);
191
192 protected:
193 std::map<uint32_t, Device *> devices;
194};
195
205{
206 public:
207 RealViewOsc(const RealViewOscParams &p);
208 virtual ~RealViewOsc() {};
209
210 void startup() override;
211
212 void serialize(CheckpointOut &cp) const override;
213 void unserialize(CheckpointIn &cp) override;
214
215 public: // RealViewCtrl::Device interface
216 uint32_t read() const override;
217 void write(uint32_t freq) override;
218
219 protected:
220 void clockPeriod(Tick clock_period);
221};
222
231{
232 public:
233 RealViewTemperatureSensor(const RealViewTemperatureSensorParams &p);
235
236 public: // RealViewCtrl::Device interface
237 uint32_t read() const override;
238 void write(uint32_t temp) override {}
239
240 protected:
243};
244
245} // namespace gem5
246
247#endif // __DEV_ARM_RV_HH__
BasicPioDevice(const Params &p, Addr size)
Definition io_device.cc:75
ClockDomain(const Params &p, VoltageDomain *voltage_domain)
Tick clockPeriod() const
PioDeviceParams Params
Definition io_device.hh:134
Device(RealViewCtrl &parent, DeviceFunc func, uint8_t site, uint8_t pos, uint8_t dcc, uint16_t dev)
Definition rv_ctrl.hh:77
virtual uint32_t read() const =0
virtual void write(uint32_t value)=0
void registerDevice(DeviceFunc func, uint8_t site, uint8_t pos, uint8_t dcc, uint16_t dev, Device *handler)
Definition rv_ctrl.cc:222
Bitfield< 29, 26 > dcc
Definition rv_ctrl.hh:141
SysLockReg sysLock
Definition rv_ctrl.hh:148
PARAMS(RealViewCtrl)
EndBitUnion(SysLockReg) BitUnion32(CfgCtrlReg) Bitfield< 11
Tick write(PacketPtr pkt) override
All writes are simply ignored.
Definition rv_ctrl.cc:136
Bitfield< 30 > wr
Definition rv_ctrl.hh:142
Bitfield< 15, 12 > pos
Definition rv_ctrl.hh:138
uint32_t scData
This register contains the result from a system control reg access.
Definition rv_ctrl.hh:159
Tick read(PacketPtr pkt) override
Handle a read to the device.
Definition rv_ctrl.cc:60
uint32_t flags
This register is used for smp booting.
Definition rv_ctrl.hh:155
RealViewCtrl(const Params &p)
The constructor for RealView just registers itself with the MMU.
Definition rv_ctrl.cc:54
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition rv_ctrl.cc:216
BitUnion32(SysLockReg) Bitfield< 15
Bitfield< 17, 16 > site
Definition rv_ctrl.hh:139
Bitfield< 16 > locked
Definition rv_ctrl.hh:133
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition rv_ctrl.cc:210
Bitfield< 25, 20 > func
Definition rv_ctrl.hh:140
Bitfield< 31 > start
Definition rv_ctrl.hh:143
std::map< uint32_t, Device * > devices
Definition rv_ctrl.hh:193
virtual ~RealViewOsc()
Definition rv_ctrl.hh:208
RealViewOsc(const RealViewOscParams &p)
Definition rv_ctrl.cc:243
RealViewTemperatureSensor(const RealViewTemperatureSensorParams &p)
Definition rv_ctrl.cc:307
void write(uint32_t temp) override
Definition rv_ctrl.hh:238
System * system
The system this RV device belongs to.
Definition rv_ctrl.hh:242
SimObject(const Params &p)
Definition sim_object.cc:58
virtual void startup()
startup() is the final initialization call before simulation.
Definition sim_object.cc:96
Bitfield< 0 > p
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
std::ostream CheckpointOut
Definition serialize.hh:66
uint64_t Tick
Tick count type.
Definition types.hh:58
Packet * PacketPtr
Overload hash function for BasicBlockRange type.
Definition binary32.hh:81

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