gem5 [DEVELOP-FOR-25.1]
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upstream.cc
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1/*
2 * Copyright (c) 2025 REDS institute of the HEIG-VD
3 * All rights reserved
4 *
5 * Copyright (c) 2015 ARM Limited
6 * All rights reserved
7 *
8 * The license below extends only to copyright in the software and shall
9 * not be construed as granting a license to any other intellectual
10 * property including but not limited to intellectual property relating
11 * to a hardware implementation of the functionality of the software
12 * licensed hereunder. You may use the software subject to the license
13 * terms below provided that you ensure that this notice is replicated
14 * unmodified and in its entirety in all distributions of the software,
15 * modified or unmodified, in source code or in binary form.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 */
40
41#include "dev/pci/upstream.hh"
42
43#include "debug/PciUpstream.hh"
44#include "dev/pci/device.hh"
45#include "dev/pci/types.hh"
46#include "params/PciConfigError.hh"
47#include "params/PciUpstream.hh"
48
49namespace gem5
50{
51
52PciConfigError::PciConfigError(const PciConfigErrorParams &p) : IsaFake(p)
53{}
54
55void
57{
58 if (range.valid()) {
59 pioAddr = range.start();
60 pioSize = range.size();
61 } else {
62 pioAddr = 0;
63 pioSize = 0;
64 }
65
66 pioPort.sendRangeChange();
67}
68
71 upToDown(p.up_to_down),
72 configErrorDevice(p.config_error)
73{}
74
75void
77{
78 upToDown->setConfigRange(getConfigAddrRange());
81}
82
85 PciIntPin pin)
86{
87 auto map_entry = devices.emplace(dev_addr, device);
88
89 DPRINTF(PciUpstream, "%02x:%02x.%i: Registering device\n", getBusNum(),
90 dev_addr.dev, dev_addr.func);
91
92 fatal_if(!map_entry.second, "%02x:%02x.%i: PCI bus ID collision\n",
93 getBusNum(), dev_addr.dev, dev_addr.func);
94
95 return DeviceInterface(*this, dev_addr, pin);
96}
97
100{
101 auto device = devices.find(addr);
102 return device != devices.end() ? device->second : nullptr;
103}
104
105const PciDevice *
107{
108 auto device = devices.find(addr);
109 return device != devices.end() ? device->second : nullptr;
110}
111
117
118const std::string
120{
121 return csprintf("%s.interface[%02x:%02x.%i]", upstream.name(),
122 upstream.getBusNum(), devAddr.dev, devAddr.func);
123}
124
125void
127{
128 DPRINTF(PciUpstream, "postInt\n");
129
130 upstream.interfacePostInt(devAddr, interruptPin);
131}
132
133void
135{
136 DPRINTF(PciUpstream, "clearInt\n");
137
138 upstream.interfaceClearInt(devAddr, interruptPin);
139}
140
141void
143{
145 device.second->recvBusChange();
146 }
147}
148
149} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:209
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition addr_range.hh:82
Addr pioAddr
Address that the device listens to.
Definition io_device.hh:151
Addr pioSize
Size that the device's address range.
Definition io_device.hh:154
ClockedObject(const ClockedObjectParams &p)
ClockedObjectParams Params
Parameters of ClockedObject.
IsaFake(const Params &p)
The constructor for Isa Fake just registers itself with the MMU.
Definition isa_fake.cc:44
PciConfigError(const Params &p)
Definition upstream.cc:52
void setAddrRange(AddrRange range)
Definition upstream.cc:56
Base class to represent a PCI device.
Definition device.hh:297
Callback interface from PCI devices to the upstream.
Definition upstream.hh:112
void clearInt()
Clear a posted PCI interrupt.
Definition upstream.cc:134
void postInt()
Post a PCI interrupt to the CPU.
Definition upstream.cc:126
const std::string name() const
Definition upstream.cc:119
void sendBusChange()
Inform each PCI devices connected to this upstream of a bus number change.
Definition upstream.cc:142
virtual PciBusNum getBusNum() const =0
Get the PCI bus number assign to that upstream.
PciUpstream(const Params &p)
Definition upstream.cc:69
PciUpDownBridge * upToDown
The two one way bridges to connect both side buses.
Definition upstream.hh:323
PciDevice * getDevice(const PciDevAddr &addr)
Retrieve a PCI device from its bus address.
Definition upstream.cc:99
virtual DeviceInterface registerDevice(PciDevice *device, PciDevAddr dev_addr, PciIntPin pin)
Register a PCI device with the host.
Definition upstream.cc:84
std::map< PciDevAddr, PciDevice * > devices
Currently registered PCI interfaces.
Definition upstream.hh:320
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition upstream.cc:76
virtual AddrRange getConfigAddrRange() const =0
Get the range for the configuration memory space for which this PCI upstream is responsible.
PciConfigError * configErrorDevice
Definition upstream.hh:325
PioPort< PioDevice > pioPort
The pioPort that handles the requests for us and provides us requests that it sees.
Definition io_device.hh:109
STL pair class.
Definition stl.hh:58
bool valid() const
Determine if the range is valid.
Addr start() const
Get the start address of the range.
Addr size() const
Get the size of the address range.
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition logging.hh:268
Bitfield< 0 > p
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
PciIntPin
Definition types.hh:74
std::string csprintf(const char *format, const Args &...args)
Definition cprintf.hh:161
uint8_t dev
Definition types.hh:62
uint8_t func
Definition types.hh:63

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