gem5: gem5::ArmISA::BrkPoint Class Reference

gem5 v25.0.0.1

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#include <self_debug.hh>

Public Member Functions
	BrkPoint (MiscRegIndex ctrl_index, MiscRegIndex val_index, SelfDebug *_conf, bool ctx_aw, bool lva, bool vmid16, bool aarch32)
bool	testLinkedBk (ThreadContext *tc, Addr vaddr, ExceptionLevel el)
bool	test (ThreadContext *tc, Addr pc, ExceptionLevel el, DBGBCR ctr, bool from_link)
bool	testAddrMatch (ThreadContext *tc, Addr pc, uint8_t bas)
bool	testAddrMissMatch (ThreadContext *tc, Addr pc, uint8_t bas)
bool	testContextMatch (ThreadContext *tc, bool ctx1, bool low_ctx)
bool	testContextMatch (ThreadContext *tc, bool ctx1)
bool	testVMIDMatch (ThreadContext *tc)
const DBGBCR	getControlReg (ThreadContext *tc)
bool	isEnabled (ThreadContext *tc, ExceptionLevel el, uint8_t hmc, uint8_t ssc, uint8_t pmc)
bool	isActive (Addr vaddr)
void	updateControl (DBGBCR val)

Protected Member Functions
Addr	getAddrfromReg (ThreadContext *tc) const
RegVal	getContextfromReg (ThreadContext *tc, bool ctxid1) const
vmid_t	getVMIDfromReg (ThreadContext *tc, bool vs)

Private Attributes
MiscRegIndex	ctrlRegIndex
MiscRegIndex	valRegIndex
SelfDebug *	conf
bool	isCntxtAware
bool	VMID16enabled
Addr	activePc
bool	enable
int	maxAddrSize
bool	onUse

Friends
class	SelfDebug

Detailed Description

Definition at line 60 of file self_debug.hh.

Constructor & Destructor Documentation

◆ BrkPoint()

gem5::ArmISA::BrkPoint::BrkPoint	(	MiscRegIndex	ctrl_index,
		MiscRegIndex	val_index,
		SelfDebug *	_conf,
		bool	ctx_aw,
		bool	lva,
		bool	vmid16,
		bool	aarch32 )

inline

Definition at line 76 of file self_debug.hh.

References activePc, conf, ctrlRegIndex, enable, isCntxtAware, maxAddrSize, onUse, SelfDebug, valRegIndex, gem5::vmid16, and VMID16enabled.

Member Function Documentation

◆ getAddrfromReg()

Addr gem5::ArmISA::BrkPoint::getAddrfromReg ( ThreadContext * tc ) const

inlineprotected

Definition at line 94 of file self_debug.hh.

References gem5::bits(), maxAddrSize, gem5::ThreadContext::readMiscReg(), and valRegIndex.

Referenced by testAddrMatch(), and testAddrMissMatch().

◆ getContextfromReg()

RegVal gem5::ArmISA::BrkPoint::getContextfromReg	(	ThreadContext *	tc,
		bool	ctxid1 ) const

inlineprotected

Definition at line 100 of file self_debug.hh.

References gem5::bits(), gem5::ThreadContext::readMiscReg(), and valRegIndex.

Referenced by testContextMatch().

◆ getControlReg()

const DBGBCR gem5::ArmISA::BrkPoint::getControlReg ( ThreadContext * tc )

inline

Definition at line 119 of file self_debug.hh.

References ctrlRegIndex, and gem5::ThreadContext::readMiscReg().

Referenced by testLinkedBk().

◆ getVMIDfromReg()

vmid_t gem5::BrkPoint::getVMIDfromReg	(	ThreadContext *	tc,
		bool	vs )

protected

Definition at line 513 of file self_debug.cc.

References gem5::bits(), gem5::ThreadContext::readMiscReg(), valRegIndex, VMID16enabled, and gem5::ArmISA::vs.

Referenced by testVMIDMatch().

◆ isActive()

bool gem5::ArmISA::BrkPoint::isActive ( Addr vaddr )

inline

Definition at line 128 of file self_debug.hh.

References activePc, and gem5::MipsISA::vaddr.

◆ isEnabled()

bool gem5::BrkPoint::isEnabled	(	ThreadContext *	tc,
		ExceptionLevel	el,
		uint8_t	hmc,
		uint8_t	ssc,
		uint8_t	pmc )

Definition at line 458 of file self_debug.cc.

References conf, gem5::ArmISA::el, gem5::ArmISA::EL0, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::hmc, panic, gem5::ArmISA::pmc, gem5::ArmISA::SelfDebug::securityStateMatch(), gem5::ArmISA::ssc, and gem5::ArmISA::v.

◆ test()

bool gem5::BrkPoint::test	(	ThreadContext *	tc,
		Addr	pc,
		ExceptionLevel	el,
		DBGBCR	ctr,
		bool	from_link )

Definition at line 211 of file self_debug.cc.

References conf, gem5::ArmISA::el, gem5::ArmISA::EL2Enabled(), gem5::ArmISA::ELIsInHost(), gem5::ArmISA::HaveExt(), gem5::ArmISA::isSecure(), gem5::MipsISA::pc, testAddrMatch(), testAddrMissMatch(), testContextMatch(), testVMIDMatch(), and gem5::ArmISA::v.

Referenced by testLinkedBk().

◆ testAddrMatch()

bool gem5::BrkPoint::testAddrMatch	(	ThreadContext *	tc,
		Addr	pc,
		uint8_t	bas )

Definition at line 370 of file self_debug.cc.

References gem5::ArmISA::bas, gem5::bits(), getAddrfromReg(), maxAddrSize, gem5::ArmISA::MISCREG_CPSR, gem5::MipsISA::pc, gem5::ThreadContext::readMiscReg(), and gem5::ArmISA::thumb.

Referenced by test().

◆ testAddrMissMatch()

bool gem5::BrkPoint::testAddrMissMatch	(	ThreadContext *	tc,
		Addr	pc,
		uint8_t	bas )

Definition at line 389 of file self_debug.cc.

References gem5::ArmISA::bas, gem5::bits(), getAddrfromReg(), maxAddrSize, gem5::ArmISA::MISCREG_CPSR, gem5::MipsISA::pc, gem5::ThreadContext::readMiscReg(), and gem5::ArmISA::thumb.

Referenced by test().

◆ testContextMatch() [1/2]

bool gem5::BrkPoint::testContextMatch	(	ThreadContext *	tc,
		bool	ctx1 )

Definition at line 409 of file self_debug.cc.

References testContextMatch().

◆ testContextMatch() [2/2]

bool gem5::BrkPoint::testContextMatch	(	ThreadContext *	tc,
		bool	ctx1,
		bool	low_ctx )

Definition at line 415 of file self_debug.cc.

References gem5::bits(), conf, gem5::ArmISA::currEL(), gem5::ArmISA::el, gem5::ArmISA::EL2, gem5::ArmISA::EL3, getContextfromReg(), isCntxtAware, gem5::ArmISA::MISCREG_CONTEXTIDR, gem5::ArmISA::MISCREG_CONTEXTIDR_EL1, gem5::ArmISA::MISCREG_CONTEXTIDR_EL2, gem5::ThreadContext::readMiscReg(), and gem5::ArmISA::v.

Referenced by test(), and testContextMatch().

◆ testLinkedBk()

bool gem5::BrkPoint::testLinkedBk	(	ThreadContext *	tc,
		Addr	vaddr,
		ExceptionLevel	el )

Definition at line 204 of file self_debug.cc.

References gem5::ArmISA::el, enable, getControlReg(), test(), and gem5::MipsISA::vaddr.

◆ testVMIDMatch()

bool gem5::BrkPoint::testVMIDMatch ( ThreadContext * tc )

Definition at line 439 of file self_debug.cc.

References gem5::bits(), gem5::ArmISA::currEL(), gem5::ArmISA::el, gem5::ArmISA::EL2, getVMIDfromReg(), gem5::ArmISA::MISCREG_VTCR_EL2, gem5::ArmISA::MISCREG_VTTBR_EL2, gem5::ThreadContext::readMiscReg(), gem5::ArmISA::v, VMID16enabled, and gem5::ArmISA::vs.

Referenced by test().

◆ updateControl()

void gem5::ArmISA::BrkPoint::updateControl ( DBGBCR val )

inline

Definition at line 140 of file self_debug.hh.

References enable, and gem5::X86ISA::val.

Referenced by gem5::ArmISA::SelfDebug::init().

◆ SelfDebug

friend class SelfDebug

friend

Definition at line 74 of file self_debug.hh.

References SelfDebug.

Referenced by BrkPoint(), and SelfDebug.

Member Data Documentation

◆ activePc

Addr gem5::ArmISA::BrkPoint::activePc

private

Definition at line 68 of file self_debug.hh.

Referenced by BrkPoint(), and isActive().

◆ conf

SelfDebug* gem5::ArmISA::BrkPoint::conf

private

Definition at line 65 of file self_debug.hh.

Referenced by BrkPoint(), isEnabled(), test(), and testContextMatch().

◆ ctrlRegIndex

MiscRegIndex gem5::ArmISA::BrkPoint::ctrlRegIndex

private

Definition at line 63 of file self_debug.hh.

Referenced by BrkPoint(), and getControlReg().

◆ enable

bool gem5::ArmISA::BrkPoint::enable

private

Definition at line 69 of file self_debug.hh.

Referenced by BrkPoint(), testLinkedBk(), and updateControl().

◆ isCntxtAware

bool gem5::ArmISA::BrkPoint::isCntxtAware

private

Definition at line 66 of file self_debug.hh.

Referenced by BrkPoint(), and testContextMatch().

◆ maxAddrSize

int gem5::ArmISA::BrkPoint::maxAddrSize

private

Definition at line 70 of file self_debug.hh.

Referenced by BrkPoint(), getAddrfromReg(), testAddrMatch(), and testAddrMissMatch().

◆ onUse

bool gem5::ArmISA::BrkPoint::onUse

private

Definition at line 71 of file self_debug.hh.

Referenced by BrkPoint().

◆ valRegIndex

MiscRegIndex gem5::ArmISA::BrkPoint::valRegIndex

private

Definition at line 64 of file self_debug.hh.

Referenced by BrkPoint(), getAddrfromReg(), getContextfromReg(), and getVMIDfromReg().

◆ VMID16enabled

bool gem5::ArmISA::BrkPoint::VMID16enabled

private

Definition at line 67 of file self_debug.hh.

Referenced by BrkPoint(), getVMIDfromReg(), and testVMIDMatch().

The documentation for this class was generated from the following files:

arch/arm/self_debug.hh
arch/arm/self_debug.cc

Generated on Sat Oct 18 2025 08:06:56 for gem5 by doxygen 1.14.0