gem5  v19.0.0.0
static_inst.hh
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30 
31 #ifndef __ARCH_POWER_INSTS_STATICINST_HH__
32 #define __ARCH_POWER_INSTS_STATICINST_HH__
33 
34 #include "base/trace.hh"
35 #include "cpu/static_inst.hh"
36 
37 namespace PowerISA
38 {
39 
41 {
42  protected:
43 
44  // Constructor
45  PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
46  : StaticInst(mnem, _machInst, __opClass)
47  {
48  }
49 
50  // Insert a condition value into a CR (condition register) field
51  inline uint32_t
52  insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
53  {
54  uint32_t bits = value << ((7 - bf) * 4);
55  uint32_t mask = ~(0xf << ((7 - bf) * 4));
56  return (cr & mask) | bits;
57  }
58 
61  void
62  printReg(std::ostream &os, RegId reg) const;
63 
64  std::string generateDisassembly(
65  Addr pc, const SymbolTable *symtab) const override;
66 
67  void
68  advancePC(PowerISA::PCState &pcState) const override
69  {
70  pcState.advance();
71  }
72 
73  size_t
74  asBytes(void *buf, size_t max_size) override
75  {
76  return simpleAsBytes(buf, max_size, machInst);
77  }
78 };
79 
80 } // namespace PowerISA
81 
82 #endif //__ARCH_POWER_INSTS_STATICINST_HH__
Bitfield< 5, 3 > reg
Definition: types.hh:89
PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
Definition: static_inst.hh:45
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: static_inst.cc:59
Bitfield< 17 > os
Definition: misc.hh:805
uint32_t insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
Definition: static_inst.hh:52
void printReg(std::ostream &os, RegId reg) const
Print a register name for disassembly given the unique dependence tag number (FP or int)...
Definition: static_inst.cc:39
const ExtMachInst machInst
The binary machine instruction.
Definition: static_inst.hh:229
Bitfield< 4 > pc
uint32_t MachInst
Definition: types.hh:41
size_t asBytes(void *buf, size_t max_size) override
Instruction classes can override this function to return a a representation of themselves as a blob o...
Definition: static_inst.hh:74
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
GenericISA::SimplePCState< MachInst > PCState
Definition: types.hh:43
Bitfield< 25, 23 > bf
Definition: types.hh:62
Base, ISA-independent static instruction class.
Definition: static_inst.hh:83
Register ID: describe an architectural register with its class and index.
Definition: reg_class.hh:79
Bitfield< 3, 0 > mask
Definition: types.hh:64
T bits(T val, int first, int last)
Extract the bitfield from position &#39;first&#39; to &#39;last&#39; (inclusive) from &#39;val&#39; and right justify it...
Definition: bitfield.hh:72
size_t simpleAsBytes(void *buf, size_t max_size, const T &t)
Definition: static_inst.hh:341
void advancePC(PowerISA::PCState &pcState) const override
Definition: static_inst.hh:68

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