gem5  v21.0.1.0
se_workload.hh
Go to the documentation of this file.
1 /*
2  * Copyright 2004 The Regents of The University of Michigan
3  * Copyright 2016 The University of Virginia
4  * Copyright 2020 Google Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are
8  * met: redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer;
10  * redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution;
13  * neither the name of the copyright holders nor the names of its
14  * contributors may be used to endorse or promote products derived from
15  * this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #ifndef __ARCH_RISCV_LINUX_SE_WORKLOAD_HH__
31 #define __ARCH_RISCV_LINUX_SE_WORKLOAD_HH__
32 
35 #include "params/RiscvEmuLinux.hh"
36 #include "sim/syscall_desc.hh"
37 
38 namespace RiscvISA
39 {
40 
41 class EmuLinux : public SEWorkload
42 {
43  protected:
44 
47 
50 
51  public:
52  using Params = RiscvEmuLinuxParams;
53 
54  EmuLinux(const Params &p) : SEWorkload(p) {}
55 
56  void syscall(ThreadContext *tc) override;
57 };
58 
59 } // namespace RiscvISA
60 
61 #endif // __ARCH_RISCV_LINUX_SE_WORKLOAD_HH__
RiscvISA::EmuLinux
Definition: se_workload.hh:41
SyscallDescTable
Definition: syscall_desc.hh:180
RiscvISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
RiscvISA::EmuLinux::syscallDescs64
static SyscallDescTable< SEWorkload::SyscallABI > syscallDescs64
64 bit syscall descriptors, indexed by call number.
Definition: se_workload.hh:46
RiscvISA
Definition: fs_workload.cc:37
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
RiscvISA::EmuLinux::syscallDescs32
static SyscallDescTable< SEWorkload::SyscallABI > syscallDescs32
32 bit syscall descriptors, indexed by call number.
Definition: se_workload.hh:49
RiscvISA::EmuLinux::EmuLinux
EmuLinux(const Params &p)
Definition: se_workload.hh:54
linux.hh
RiscvISA::EmuLinux::syscall
void syscall(ThreadContext *tc) override
Definition: se_workload.cc:79
se_workload.hh
RiscvISA::SEWorkload
Definition: se_workload.hh:40
RiscvISA::EmuLinux::Params
RiscvEmuLinuxParams Params
Definition: se_workload.hh:52
syscall_desc.hh

Generated on Tue Jun 22 2021 15:28:20 for gem5 by doxygen 1.8.17