gem5
v21.0.1.0
arch
riscv
linux
fs_workload.cc
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2021 Huawei International
3
* All rights reserved
4
*
5
* Redistribution and use in source and binary forms, with or without
6
* modification, are permitted provided that the following conditions are
7
* met: redistributions of source code must retain the above copyright
8
* notice, this list of conditions and the following disclaimer;
9
* redistributions in binary form must reproduce the above copyright
10
* notice, this list of conditions and the following disclaimer in the
11
* documentation and/or other materials provided with the distribution;
12
* neither the name of the copyright holders nor the names of its
13
* contributors may be used to endorse or promote products derived from
14
* this software without specific prior written permission.
15
*
16
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
*/
28
29
#include "
arch/riscv/linux/fs_workload.hh
"
30
31
#include "
arch/riscv/faults.hh
"
32
#include "
base/loader/dtb_file.hh
"
33
#include "
base/loader/object_file.hh
"
34
#include "
base/loader/symtab.hh
"
35
#include "
sim/kernel_workload.hh
"
36
#include "
sim/system.hh
"
37
38
namespace
RiscvISA
39
{
40
41
void
42
FsLinux::initState
()
43
{
44
KernelWorkload::initState
();
45
46
if
(
params
().dtb_filename !=
""
) {
47
inform
(
"Loading DTB file: %s at address %#x\n"
,
params
().dtb_filename,
48
params
().dtb_addr);
49
50
auto
*dtb_file = new ::Loader::DtbFile(
params
().dtb_filename);
51
52
if
(!dtb_file->addBootCmdLine(
53
commandLine
.c_str(),
commandLine
.size())) {
54
warn
(
"couldn't append bootargs to DTB file: %s\n"
,
55
params
().dtb_filename);
56
}
57
58
dtb_file->buildImage().offset(
params
().dtb_addr)
59
.write(
system
->
physProxy
);
60
delete
dtb_file;
61
62
for
(
auto
*tc:
system
->
threads
) {
63
tc->setIntReg(11,
params
().dtb_addr);
64
}
65
}
else
{
66
warn
(
"No DTB file specified\n"
);
67
}
68
69
for
(
auto
*tc:
system
->
threads
) {
70
RiscvISA::Reset
().invoke(tc);
71
tc->activate();
72
}
73
}
74
75
}
// namespace RiscvISA
warn
#define warn(...)
Definition:
logging.hh:239
faults.hh
system.hh
System::physProxy
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition:
system.hh:319
dtb_file.hh
Workload::system
System * system
Definition:
workload.hh:73
RiscvISA
Definition:
fs_workload.cc:37
RiscvISA::FsLinux::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition:
fs_workload.cc:42
KernelWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition:
kernel_workload.cc:86
fs_workload.hh
System::threads
Threads threads
Definition:
system.hh:304
inform
#define inform(...)
Definition:
logging.hh:240
symtab.hh
kernel_workload.hh
SimObject::params
const Params & params() const
Definition:
sim_object.hh:168
KernelWorkload::commandLine
const std::string commandLine
Definition:
kernel_workload.hh:71
Ps2::Reset
@ Reset
Definition:
types.hh:63
object_file.hh
Generated on Tue Jun 22 2021 15:28:20 for gem5 by
doxygen
1.8.17