gem5
[DEVELOP-FOR-23.0]
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#include <tlbi_op.hh>
Public Member Functions | |
TLBIMVA (ExceptionLevel _targetEL, bool _secure, Addr _addr, uint16_t _asid, bool last_level) | |
void | operator() (ThreadContext *tc) override |
bool | match (TlbEntry *entry, vmid_t curr_vmid) const override |
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TLBIOp (ExceptionLevel _targetEL, bool _secure) | |
virtual | ~TLBIOp () |
void | broadcast (ThreadContext *tc) |
Broadcast the TLB Invalidate operation to all TLBs in the Arm system. More... | |
virtual bool | stage1Flush () const |
Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class. More... | |
virtual bool | stage2Flush () const |
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class. More... | |
Public Attributes | |
Addr | addr |
uint16_t | asid |
bool | inHost |
bool | lastLevel |
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bool | secureLookup |
ExceptionLevel | targetEL |
TLB Invalidate by VA.
Definition at line 320 of file tlbi_op.hh.
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inline |
Definition at line 323 of file tlbi_op.hh.
Implements gem5::ArmISA::TLBIOp.
Reimplemented in gem5::ArmISA::DTLBIMVA, and gem5::ArmISA::ITLBIMVA.
Definition at line 256 of file tlbi_op.cc.
References addr, asid, gem5::ArmISA::TlbEntry::Lookup::asn, gem5::ArmISA::EL2, gem5::ArmISA::TlbEntry::Lookup::functional, gem5::ArmISA::TlbEntry::Lookup::hyp, gem5::ArmISA::TlbEntry::Lookup::ignoreAsn, gem5::ArmISA::TlbEntry::Lookup::inHost, inHost, lastLevel, gem5::ArmISA::TlbEntry::Lookup::mode, gem5::BaseMMU::Read, gem5::ArmISA::TlbEntry::Lookup::secure, gem5::ArmISA::TLBIOp::secureLookup, gem5::ArmISA::TLBIOp::targetEL, gem5::ArmISA::TlbEntry::Lookup::targetEL, gem5::ArmISA::te, gem5::ArmISA::TlbEntry::Lookup::va, and gem5::ArmISA::TlbEntry::Lookup::vmid.
Referenced by gem5::ArmISA::ITLBIMVA::match(), and gem5::ArmISA::DTLBIMVA::match().
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overridevirtual |
Reimplemented from gem5::ArmISA::TLBIOp.
Reimplemented in gem5::ArmISA::DTLBIMVA, and gem5::ArmISA::ITLBIMVA.
Definition at line 243 of file tlbi_op.cc.
References gem5::ArmISA::MMU::flushStage1(), gem5::ThreadContext::getCheckerCpuPtr(), gem5::ArmISA::getMMUPtr(), inHost, gem5::ArmISA::MISCREG_HCR_EL2, and gem5::ThreadContext::readMiscReg().
Addr gem5::ArmISA::TLBIMVA::addr |
Definition at line 333 of file tlbi_op.hh.
Referenced by match().
uint16_t gem5::ArmISA::TLBIMVA::asid |
Definition at line 334 of file tlbi_op.hh.
Referenced by match().
bool gem5::ArmISA::TLBIMVA::inHost |
Definition at line 335 of file tlbi_op.hh.
Referenced by match(), and operator()().
bool gem5::ArmISA::TLBIMVA::lastLevel |
Definition at line 336 of file tlbi_op.hh.
Referenced by match().