gem5
[DEVELOP-FOR-23.0]
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#include <self_debug.hh>
Public Member Functions | |
WatchPoint (MiscRegIndex ctrl_index, MiscRegIndex val_index, SelfDebug *_conf, bool lva, bool aarch32) | |
bool | compareAddress (ThreadContext *tc, Addr in_addr, uint8_t bas, uint8_t mask, unsigned size) |
Addr | getAddrfromReg (ThreadContext *tc) |
bool | isDoubleAligned (Addr addr) |
void | updateControl (DBGWCR val) |
bool | isEnabled (ThreadContext *tc, ExceptionLevel el, bool hmc, uint8_t ssc, uint8_t pac) |
bool | test (ThreadContext *tc, Addr addr, ExceptionLevel el, bool &wrt, bool atomic, unsigned size) |
Private Attributes | |
MiscRegIndex | ctrlRegIndex |
MiscRegIndex | valRegIndex |
SelfDebug * | conf |
bool | enable |
int | maxAddrSize |
Friends | |
class | SelfDebug |
Definition at line 147 of file self_debug.hh.
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inline |
Definition at line 159 of file self_debug.hh.
References maxAddrSize.
bool gem5::WatchPoint::compareAddress | ( | ThreadContext * | tc, |
Addr | in_addr, | ||
uint8_t | bas, | ||
uint8_t | mask, | ||
unsigned | size | ||
) |
Definition at line 589 of file self_debug.cc.
References gem5::X86ISA::addr, gem5::ArmISA::bas, gem5::bits(), getAddrfromReg(), gem5::ArmISA::i, isDoubleAligned(), gem5::ArmISA::j, gem5::ArmISA::mask, maxAddrSize, and gem5::ArmISA::v.
Referenced by test().
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inline |
Definition at line 172 of file self_debug.hh.
References gem5::bits(), maxAddrSize, gem5::ThreadContext::readMiscReg(), and valRegIndex.
Referenced by compareAddress().
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inline |
Definition at line 178 of file self_debug.hh.
References gem5::X86ISA::addr.
Referenced by compareAddress().
bool gem5::WatchPoint::isEnabled | ( | ThreadContext * | tc, |
ExceptionLevel | el, | ||
bool | hmc, | ||
uint8_t | ssc, | ||
uint8_t | pac | ||
) |
Definition at line 523 of file self_debug.cc.
References conf, gem5::ArmISA::el, gem5::ArmISA::EL0, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::hmc, gem5::ArmISA::SelfDebug::isAArch32(), gem5::ArmISA::pac, panic, gem5::ArmISA::SelfDebug::securityStateMatch(), gem5::ArmISA::ssc, and gem5::ArmISA::v.
Referenced by test().
bool gem5::WatchPoint::test | ( | ThreadContext * | tc, |
Addr | addr, | ||
ExceptionLevel | el, | ||
bool & | wrt, | ||
bool | atomic, | ||
unsigned | size | ||
) |
Definition at line 569 of file self_debug.cc.
References gem5::X86ISA::addr, gem5::ArmISA::atomic, compareAddress(), conf, ctrlRegIndex, gem5::ArmISA::el, gem5::ArmISA::SelfDebug::getBrkPoint(), isEnabled(), gem5::ThreadContext::readMiscReg(), and gem5::ArmISA::v.
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inline |
Definition at line 184 of file self_debug.hh.
References enable, and gem5::X86ISA::val.
Referenced by gem5::ArmISA::SelfDebug::init().
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friend |
Definition at line 157 of file self_debug.hh.
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private |
Definition at line 152 of file self_debug.hh.
Referenced by isEnabled(), and test().
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private |
Definition at line 150 of file self_debug.hh.
Referenced by test().
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private |
Definition at line 153 of file self_debug.hh.
Referenced by updateControl().
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private |
Definition at line 154 of file self_debug.hh.
Referenced by compareAddress(), getAddrfromReg(), and WatchPoint().
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private |
Definition at line 151 of file self_debug.hh.
Referenced by getAddrfromReg().