gem5
[DEVELOP-FOR-23.0]
|
Enumerations | |
enum | { _G0Idx, _G1Idx, _G2Idx, _G3Idx, _G4Idx, _G5Idx, _G6Idx, _G7Idx, _O0Idx, _O1Idx, _O2Idx, _O3Idx, _O4Idx, _O5Idx, _O6Idx, _O7Idx, _L0Idx, _L1Idx, _L2Idx, _L3Idx, _L4Idx, _L5Idx, _L6Idx, _L7Idx, _I0Idx, _I1Idx, _I2Idx, _I3Idx, _I4Idx, _I5Idx, _I6Idx, _I7Idx, NumArchRegs, _Ureg0Idx = NumArchRegs, _YIdx, _CcrIdx, _CansaveIdx, _CanrestoreIdx, _CleanwinIdx, _OtherwinIdx, _WstateIdx, _GsrIdx, NumMicroRegs = _GsrIdx - _Ureg0Idx + 1 } |
Functions | |
constexpr RegId | g (int index) |
constexpr RegId | o (int index) |
constexpr RegId | l (int index) |
constexpr RegId | i (int index) |
anonymous enum |
|
inlineconstexpr |
Definition at line 141 of file int.hh.
References G0, gem5::MipsISA::index, and gem5::SparcISA::intRegClass.
|
inlineconstexpr |
Definition at line 159 of file int.hh.
References I0, gem5::MipsISA::index, and gem5::SparcISA::intRegClass.
|
inlineconstexpr |
Definition at line 153 of file int.hh.
References gem5::MipsISA::index, gem5::SparcISA::intRegClass, and L0.
|
inlineconstexpr |
Definition at line 147 of file int.hh.
References gem5::MipsISA::index, gem5::SparcISA::intRegClass, and O0.
Referenced by gem5::guest_abi::Argument< SparcPseudoInstABI, uint64_t >::get(), gem5::stl_helpers::opExtract_impl::opExtractPrimDisp(), gem5::Packet::print(), and gem5::DrainManager::unregisterDrainable().
constexpr RegId gem5::SparcISA::int_reg::Canrestore = intRegClass[_CanrestoreIdx] |
Definition at line 134 of file int.hh.
Referenced by gem5::SparcLinux::archClone(), gem5::SparcISA::SEWorkload::flushWindows(), and gem5::SparcProcess::initState().
constexpr RegId gem5::SparcISA::int_reg::Cansave = intRegClass[_CansaveIdx] |
Definition at line 133 of file int.hh.
Referenced by gem5::SparcLinux::archClone(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::SparcISA::SEWorkload::flushWindows(), and gem5::SparcProcess::initState().
constexpr RegId gem5::SparcISA::int_reg::Ccr = intRegClass[_CcrIdx] |
Definition at line 132 of file int.hh.
Referenced by gem5::trace::SparcNativeTrace::check(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), and gem5::guest_abi::Result< ABI, SyscallReturn, typename std::enable_if_t< std::is_base_of_v< SparcISA::SEWorkload::BaseSyscallABI, ABI > > >::store().
constexpr RegId gem5::SparcISA::int_reg::Cleanwin = intRegClass[_CleanwinIdx] |
Definition at line 135 of file int.hh.
Referenced by gem5::SparcLinux::archClone(), and gem5::SparcProcess::initState().
|
inlineconstexpr |
constexpr RegId gem5::SparcISA::int_reg::G1 = intRegClass[_G1Idx] |
Definition at line 92 of file int.hh.
Referenced by gem5::SparcProcess::argsInit(), gem5::SparcISA::EmuLinux::syscall32(), and gem5::SparcISA::EmuLinux::syscall64().
constexpr RegId gem5::SparcISA::int_reg::G2 = intRegClass[_G2Idx] |
constexpr RegId gem5::SparcISA::int_reg::G3 = intRegClass[_G3Idx] |
constexpr RegId gem5::SparcISA::int_reg::G4 = intRegClass[_G4Idx] |
constexpr RegId gem5::SparcISA::int_reg::G5 = intRegClass[_G5Idx] |
constexpr RegId gem5::SparcISA::int_reg::G6 = intRegClass[_G6Idx] |
constexpr RegId gem5::SparcISA::int_reg::G7 = intRegClass[_G7Idx] |
constexpr RegId gem5::SparcISA::int_reg::Gsr = intRegClass[_GsrIdx] |
constexpr RegId gem5::SparcISA::int_reg::I0 = intRegClass[_I0Idx] |
constexpr RegId gem5::SparcISA::int_reg::I1 = intRegClass[_I1Idx] |
Definition at line 122 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::I2 = intRegClass[_I2Idx] |
Definition at line 123 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::I3 = intRegClass[_I3Idx] |
Definition at line 124 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::I4 = intRegClass[_I4Idx] |
Definition at line 125 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::I5 = intRegClass[_I5Idx] |
Definition at line 126 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::I6 = intRegClass[_I6Idx] |
constexpr RegId gem5::SparcISA::int_reg::I7 = intRegClass[_I7Idx] |
constexpr RegId gem5::SparcISA::int_reg::L0 = intRegClass[_L0Idx] |
Definition at line 111 of file int.hh.
Referenced by gem5::ArmISA::TableWalker::completeDrain(), gem5::ArmISA::TableWalker::doL0LongDescriptorWrapper(), gem5::ArmISA::V8PageTableOps4k::firstLevel(), gem5::ArmISA::V8PageTableOps16k::firstLevel(), gem5::ArmISA::V8PageTableOps4k::firstS2Level(), l(), gem5::ArmISA::TableWalker::processWalkAArch64(), gem5::ArmISA::TLB::TLB(), and gem5::ArmISA::TableWalker::LongDescriptor::type().
constexpr RegId gem5::SparcISA::int_reg::L1 = intRegClass[_L1Idx] |
Definition at line 112 of file int.hh.
Referenced by gem5::ArmISA::TableWalker::completeDrain(), gem5::ArmISA::TableWalker::doL1Descriptor(), gem5::ArmISA::TableWalker::doL1DescriptorWrapper(), gem5::ArmISA::TableWalker::doL1LongDescriptorWrapper(), gem5::ArmISA::TableWalker::doLongDescriptor(), gem5::ArmISA::V7LPageTableOps::firstLevel(), gem5::ArmISA::V8PageTableOps4k::firstLevel(), gem5::ArmISA::V8PageTableOps16k::firstLevel(), gem5::ArmISA::V8PageTableOps64k::firstLevel(), gem5::ArmISA::V8PageTableOps4k::firstS2Level(), gem5::ArmISA::V8PageTableOps16k::firstS2Level(), gem5::ArmISA::V8PageTableOps64k::firstS2Level(), gem5::ArmISA::TableWalker::L1Descriptor::L1Descriptor(), gem5::ArmISA::TableWalker::LongDescriptor::nextDescAddr(), gem5::ArmISA::TableWalker::LongDescriptor::offsetBits(), gem5::ArmISA::TableWalker::processWalk(), gem5::ArmISA::TableWalker::processWalkLPAE(), gem5::ArmISA::TableWalker::toLookupLevel(), and gem5::ArmISA::TableWalker::LongDescriptor::type().
constexpr RegId gem5::SparcISA::int_reg::L2 = intRegClass[_L2Idx] |
Definition at line 113 of file int.hh.
Referenced by gem5::ArmISA::TableWalker::completeDrain(), gem5::ArmISA::TableWalker::doL1Descriptor(), gem5::ArmISA::TableWalker::doL1DescriptorWrapper(), gem5::ArmISA::TableWalker::doL2Descriptor(), gem5::ArmISA::TableWalker::doL2DescriptorWrapper(), gem5::ArmISA::TableWalker::doL2LongDescriptorWrapper(), gem5::ArmISA::TableWalker::doLongDescriptor(), gem5::ArmISA::V8PageTableOps4k::firstLevel(), gem5::ArmISA::V8PageTableOps16k::firstLevel(), gem5::ArmISA::V8PageTableOps64k::firstLevel(), gem5::ArmISA::V8PageTableOps4k::firstS2Level(), gem5::ArmISA::V8PageTableOps16k::firstS2Level(), gem5::ArmISA::V8PageTableOps64k::firstS2Level(), gem5::ArmISA::TableWalker::L2Descriptor::L2Descriptor(), gem5::ArmISA::TableWalker::processWalkLPAE(), gem5::ArmISA::TableWalker::toLookupLevel(), and gem5::ArmISA::TableWalker::LongDescriptor::type().
constexpr RegId gem5::SparcISA::int_reg::L3 = intRegClass[_L3Idx] |
Definition at line 114 of file int.hh.
Referenced by gem5::ArmISA::TableWalker::completeDrain(), gem5::ArmISA::TableWalker::LongDescriptor::dbgHeader(), gem5::ArmISA::TableWalker::doL3LongDescriptorWrapper(), gem5::ArmISA::TableWalker::doLongDescriptor(), gem5::ArmISA::V8PageTableOps16k::firstLevel(), gem5::ArmISA::V8PageTableOps64k::firstLevel(), gem5::ArmISA::V8PageTableOps16k::firstS2Level(), gem5::ArmISA::V8PageTableOps64k::firstS2Level(), gem5::ArmISA::V7LPageTableOps::lastLevel(), gem5::ArmISA::V8PageTableOps4k::lastLevel(), gem5::ArmISA::V8PageTableOps16k::lastLevel(), gem5::ArmISA::V8PageTableOps64k::lastLevel(), gem5::ArmISA::TableWalker::toLookupLevel(), and gem5::ArmISA::TableWalker::LongDescriptor::type().
constexpr RegId gem5::SparcISA::int_reg::L4 = intRegClass[_L4Idx] |
constexpr RegId gem5::SparcISA::int_reg::L5 = intRegClass[_L5Idx] |
constexpr RegId gem5::SparcISA::int_reg::L6 = intRegClass[_L6Idx] |
constexpr RegId gem5::SparcISA::int_reg::L7 = intRegClass[_L7Idx] |
const int gem5::SparcISA::int_reg::NumRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroRegs |
Definition at line 67 of file int.hh.
Referenced by gem5::X86ISA::EndBitUnion(), gem5::ArmISA::EndBitUnion(), gem5::SparcISA::ISA::installGlobals(), and gem5::SparcISA::ISA::installWindow().
constexpr RegId gem5::SparcISA::int_reg::O0 = intRegClass[_O0Idx] |
Definition at line 101 of file int.hh.
Referenced by o(), and gem5::guest_abi::Result< SparcPseudoInstABI, T >::store().
constexpr RegId gem5::SparcISA::int_reg::O1 = intRegClass[_O1Idx] |
Definition at line 102 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::O2 = intRegClass[_O2Idx] |
Definition at line 103 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::O3 = intRegClass[_O3Idx] |
Definition at line 104 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::O4 = intRegClass[_O4Idx] |
Definition at line 105 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::O5 = intRegClass[_O5Idx] |
Definition at line 106 of file int.hh.
Referenced by SC_MODULE().
constexpr RegId gem5::SparcISA::int_reg::O6 = intRegClass[_O6Idx] |
constexpr RegId gem5::SparcISA::int_reg::O7 = intRegClass[_O7Idx] |
constexpr RegId gem5::SparcISA::int_reg::Otherwin = intRegClass[_OtherwinIdx] |
Definition at line 136 of file int.hh.
Referenced by gem5::SparcLinux::archClone(), gem5::SparcISA::SEWorkload::flushWindows(), and gem5::SparcProcess::initState().
constexpr RegId gem5::SparcISA::int_reg::Ureg0 = intRegClass[_Ureg0Idx] |
constexpr RegId gem5::SparcISA::int_reg::Wstate = intRegClass[_WstateIdx] |
Definition at line 137 of file int.hh.
Referenced by gem5::SparcLinux::archClone(), and gem5::SparcProcess::initState().
constexpr RegId gem5::SparcISA::int_reg::Y = intRegClass[_YIdx] |
Definition at line 131 of file int.hh.
Referenced by gem5::ArmISA::Crypto::_sha1Op(), gem5::ArmISA::addPACDA(), gem5::ArmISA::addPACDB(), gem5::ArmISA::addPACGA(), gem5::ArmISA::addPACIA(), gem5::ArmISA::addPACIB(), gem5::ArmISA::authDA(), gem5::ArmISA::authDB(), gem5::ArmISA::authIA(), gem5::ArmISA::authIB(), sc_dt::b_and_assign_(), gem5::ArmISA::Crypto::choose(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), gem5::branch_prediction::TAGEBase::handleAllocAndUReset(), gem5::ArmISA::Crypto::load2Reg(), gem5::ArmISA::Crypto::load3Reg(), gem5::ArmISA::Crypto::majority(), gem5::MatStore< size, size >::operator==(), gem5::ArmISA::Crypto::parity(), gem5::ParseParam< MatStore< X, Y > >::parse(), SC_MODULE(), gem5::ArmISA::Crypto::sha1H(), gem5::ArmISA::Crypto::sha1Op(), gem5::ArmISA::Crypto::sha1Su0(), gem5::ArmISA::Crypto::sha1Su1(), gem5::ArmISA::Crypto::sha256H(), gem5::ArmISA::Crypto::sha256H2(), gem5::ArmISA::Crypto::sha256Op(), gem5::ArmISA::Crypto::sha256Su0(), gem5::ArmISA::Crypto::sha256Su1(), and gem5::MatStore< size, size >::ySize().