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arch
sparc
pseudo_inst_abi.hh
Go to the documentation of this file.
1
/*
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* Copyright 2021 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_SPARC_PSEUDO_INST_ABI_HH__
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#define __ARCH_SPARC_PSEUDO_INST_ABI_HH__
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#include "
arch/sparc/regs/int.hh
"
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#include "
cpu/thread_context.hh
"
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#include "
sim/guest_abi.hh
"
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35
namespace
gem5
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{
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struct
SparcPseudoInstABI
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{
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using
State
= int;
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};
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namespace
guest_abi
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{
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template
<
typename
T>
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struct
Result
<
SparcPseudoInstABI
, T>
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{
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static
void
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store
(
ThreadContext
*tc,
const
T &ret)
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{
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// This assumes that all pseudo ops have their return value set
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// by the pseudo op instruction. This may need to be revisited if we
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// modify the pseudo op ABI in util/m5/m5op_x86.S
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tc->
setReg
(
SparcISA::int_reg::O0
, ret);
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}
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};
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template
<>
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struct
Argument
<
SparcPseudoInstABI
, uint64_t>
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{
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static
uint64_t
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get
(
ThreadContext
*tc,
SparcPseudoInstABI::State
&
state
)
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{
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panic_if
(
state
>= 6,
"Too many psuedo inst arguments."
);
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return
tc->
getReg
(
SparcISA::int_reg::o
(
state
++));
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}
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};
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}
// namespace guest_abi
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}
// namespace gem5
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#endif // __ARCH_SPARC_PSEUDO_INST_ABI_HH__
gem5::SparcISA::int_reg::O0
constexpr RegId O0
Definition:
int.hh:101
gem5::ThreadContext::getReg
virtual RegVal getReg(const RegId ®) const
Definition:
thread_context.cc:180
gem5::SparcISA::int_reg::o
constexpr RegId o(int index)
Definition:
int.hh:147
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
int.hh
state
atomic_var_t state
Definition:
helpers.cc:188
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition:
logging.hh:214
guest_abi.hh
gem5::guest_abi::Result< SparcPseudoInstABI, T >::store
static void store(ThreadContext *tc, const T &ret)
Definition:
pseudo_inst_abi.hh:50
gem5::SparcPseudoInstABI::State
int State
Definition:
pseudo_inst_abi.hh:40
gem5::guest_abi::Argument
Definition:
definition.hh:98
gem5::guest_abi::Result
Definition:
definition.hh:63
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:37
gem5::guest_abi::Argument< SparcPseudoInstABI, uint64_t >::get
static uint64_t get(ThreadContext *tc, SparcPseudoInstABI::State &state)
Definition:
pseudo_inst_abi.hh:63
gem5::SparcPseudoInstABI
Definition:
pseudo_inst_abi.hh:38
thread_context.hh
gem5::ThreadContext::setReg
virtual void setReg(const RegId ®, RegVal val)
Definition:
thread_context.cc:188
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