pcstate.hh

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/*
 * Copyright (c) 2009 The University of Edinburgh
 * All rights reserved.
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 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
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 * redistributions in binary form must reproduce the above copyright
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 * neither the name of the copyright holders nor the names of its
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 * this software without specific prior written permission.
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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#ifndef __ARCH_POWER_PCSTATE_HH__
#define __ARCH_POWER_PCSTATE_HH__
 
#include "arch/generic/pcstate.hh"
#include "arch/power/types.hh"
#include "enums/ByteOrder.hh"
 
namespace gem5
{
 
namespace PowerISA
{
 
class PCState : public GenericISA::SimplePCState<4>
{
  private:
    ByteOrder guestByteOrder = ByteOrder::big;
 
  public:
    using GenericISA::SimplePCState<4>::SimplePCState;
 
    PCState(const PCState &other) :
        GenericISA::SimplePCState<4>(other),
        guestByteOrder(other.guestByteOrder)
    {}
    PCState &operator=(const PCState &other) = default;
 
    PCStateBase *clone() const override { return new PCState(*this); }
 
    void
    update(const PCStateBase &other) override
    {
        GenericISA::SimplePCState<4>::update(other);
        auto &pcstate = other.as<PCState>();
        guestByteOrder = pcstate.guestByteOrder;
    }
 
    ByteOrder
    byteOrder() const
    {
        return guestByteOrder;
    }
 
    void
    byteOrder(ByteOrder order)
    {
        guestByteOrder = order;
    }
};
 
} // namespace PowerISA
} // namespace gem5
 
#endif // __ARCH_POWER_PCSTATE_HH__