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mem
cache
prefetch
multi.hh
Go to the documentation of this file.
1
/*
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* Copyright (c) 2014, 2019 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __MEM_CACHE_PREFETCH_MULTI_HH__
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#define __MEM_CACHE_PREFETCH_MULTI_HH__
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#include <vector>
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#include "
mem/cache/prefetch/base.hh
"
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namespace
gem5
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{
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struct
MultiPrefetcherParams;
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namespace
prefetch
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{
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class
Multi
:
public
Base
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{
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public
:
// SimObject
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Multi
(
const
MultiPrefetcherParams &
p
);
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public
:
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void
setCache
(
BaseCache
*_cache)
override
;
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PacketPtr
getPacket
()
override
;
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Tick
nextPrefetchReadyTime
()
const override
;
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68
void
notify
(
const
PacketPtr
&pkt,
const
PrefetchInfo
&pfi)
override
{};
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void
notifyFill
(
const
PacketPtr
&pkt)
override
{};
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protected
:
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std::vector<Base*>
prefetchers
;
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uint8_t
lastChosenPf
;
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};
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}
// namespace prefetch
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}
// namespace gem5
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#endif //__MEM_CACHE_PREFETCH_MULTI_HH__
gem5::prefetch::Multi::notifyFill
void notifyFill(const PacketPtr &pkt) override
Notify prefetcher of cache fill.
Definition:
multi.hh:69
gem5::prefetch::Multi::notify
void notify(const PacketPtr &pkt, const PrefetchInfo &pfi) override
Ignore notifications since each sub-prefetcher already gets a notification through their probes-based...
Definition:
multi.hh:68
std::vector
STL vector class.
Definition:
stl.hh:37
gem5::prefetch::Multi::prefetchers
std::vector< Base * > prefetchers
List of sub-prefetchers ordered by priority.
Definition:
multi.hh:69
base.hh
gem5::VegaISA::p
Bitfield< 54 > p
Definition:
pagetable.hh:70
gem5::BaseCache
A basic cache interface.
Definition:
base.hh:94
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition:
packet.hh:294
gem5::Tick
uint64_t Tick
Tick count type.
Definition:
types.hh:58
gem5::prefetch::Multi::lastChosenPf
uint8_t lastChosenPf
Definition:
multi.hh:75
gem5::prefetch::Multi
Definition:
multi.hh:53
gem5::prefetch::Multi::setCache
void setCache(BaseCache *_cache) override
Definition:
multi.cc:56
gem5::prefetch::Multi::Multi
Multi(const MultiPrefetcherParams &p)
Definition:
multi.cc:48
gem5::prefetch::Multi::nextPrefetchReadyTime
Tick nextPrefetchReadyTime() const override
Definition:
multi.cc:63
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:37
gem5::prefetch::Base
Definition:
base.hh:71
gem5::prefetch::Multi::getPacket
PacketPtr getPacket() override
Definition:
multi.cc:74
gem5::prefetch::Base::PrefetchInfo
Class containing the information needed by the prefetch to train and generate new prefetch requests.
Definition:
base.hh:96
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