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sim
se_workload.cc
Go to the documentation of this file.
1
/*
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* Copyright 2020 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
5
* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
7
* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
9
* notice, this list of conditions and the following disclaimer in the
10
* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
sim/se_workload.hh
"
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#include "
cpu/thread_context.hh
"
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#include "params/SEWorkload.hh"
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#include "
sim/process.hh
"
33
#include "
sim/system.hh
"
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namespace
gem5
36
{
37
38
SEWorkload::SEWorkload
(
const
Params &
p
,
Addr
page_shift) :
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Workload(
p
), memPools(page_shift)
40
{}
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42
void
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SEWorkload::setSystem
(System *sys)
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{
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Workload::setSystem
(sys);
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AddrRangeList
memories = sys->getPhysMem().getConfAddrRanges();
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const
auto
&m5op_range = sys->m5opRange();
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if
(m5op_range.valid())
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memories -= m5op_range;
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memPools.populate(memories);
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}
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56
void
57
SEWorkload::serialize
(
CheckpointOut
&cp)
const
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{
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memPools.serialize(cp);
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}
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62
void
63
SEWorkload::unserialize
(
CheckpointIn
&cp)
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{
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memPools.unserialize(cp);
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}
67
68
void
69
SEWorkload::syscall
(
ThreadContext
*tc)
70
{
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tc->
getProcessPtr
()->
syscall
(tc);
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}
73
74
Addr
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SEWorkload::allocPhysPages
(
int
npages,
int
pool_id)
76
{
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return
memPools.allocPhysPages(npages, pool_id);
78
}
79
80
Addr
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SEWorkload::memSize
(
int
pool_id)
const
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{
83
return
memPools.memSize(pool_id);
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}
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86
Addr
87
SEWorkload::freeMemSize
(
int
pool_id)
const
88
{
89
return
memPools.freeMemSize(pool_id);
90
}
91
92
}
// namespace gem5
gem5::ArmISA::SEWorkload::SEWorkload
SEWorkload(const Params &p, Addr page_shift)
Definition:
se_workload.hh:47
system.hh
gem5::SEWorkload::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition:
se_workload.cc:63
gem5::AddrRangeList
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
Definition:
addr_range.hh:57
gem5::CheckpointIn
Definition:
serialize.hh:68
gem5::Process::syscall
virtual void syscall(ThreadContext *tc)
Definition:
process.hh:80
gem5::SEWorkload::allocPhysPages
Addr allocPhysPages(int npages, int pool_id=0)
Definition:
se_workload.cc:75
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
gem5::VegaISA::p
Bitfield< 54 > p
Definition:
pagetable.hh:70
process.hh
gem5::SEWorkload::syscall
void syscall(ThreadContext *tc) override
Definition:
se_workload.cc:69
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:147
gem5::SEWorkload::freeMemSize
Addr freeMemSize(int pool_id=0) const
Definition:
se_workload.cc:87
gem5::ThreadContext::getProcessPtr
virtual Process * getProcessPtr()=0
gem5::ArmISA::SEWorkload::setSystem
void setSystem(System *sys) override
Definition:
se_workload.hh:52
gem5::SEWorkload::memSize
Addr memSize(int pool_id=0) const
Definition:
se_workload.cc:81
gem5::CheckpointOut
std::ostream CheckpointOut
Definition:
serialize.hh:66
gem5::Workload::setSystem
virtual void setSystem(System *sys)
Definition:
workload.hh:88
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:37
thread_context.hh
se_workload.hh
gem5::SEWorkload::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition:
se_workload.cc:57
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