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sim
sub_system.hh
Go to the documentation of this file.
1
/*
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* Copyright (c) 2014-2016 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
19
* notice, this list of conditions and the following disclaimer in the
20
* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __SIM_SUB_SYSTEM_HH__
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#define __SIM_SUB_SYSTEM_HH__
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#include <vector>
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#include "params/SubSystem.hh"
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#include "
sim/sim_object.hh
"
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namespace
gem5
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{
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54
class
PowerModel;
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60
class
SubSystem
:
public
SimObject
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{
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public
:
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typedef
SubSystemParams
Params
;
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SubSystem
(
const
Params
&
p
);
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66
double
getDynamicPower
()
const
;
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double
getStaticPower
()
const
;
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void
registerPowerProducer
(
PowerModel
*pm) {
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powerProducers
.push_back(pm);
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}
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protected
:
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std::vector<PowerModel*>
powerProducers
;
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};
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}
// namespace gem5
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#endif
gem5::PowerModel
Definition:
power_model.hh:107
gem5::SubSystem::getStaticPower
double getStaticPower() const
Definition:
sub_system.cc:65
std::vector
STL vector class.
Definition:
stl.hh:37
gem5::SubSystem
The SubSystem simobject does nothing, it is just a container for other simobjects used by the configu...
Definition:
sub_system.hh:60
gem5::SimObject::Params
SimObjectParams Params
Definition:
sim_object.hh:170
gem5::SubSystem::getDynamicPower
double getDynamicPower() const
Definition:
sub_system.cc:56
gem5::SubSystem::SubSystem
SubSystem(const Params &p)
Definition:
sub_system.cc:47
gem5::VegaISA::p
Bitfield< 54 > p
Definition:
pagetable.hh:70
sim_object.hh
gem5::SubSystem::powerProducers
std::vector< PowerModel * > powerProducers
Definition:
sub_system.hh:75
gem5::SubSystem::Params
SubSystemParams Params
Definition:
sub_system.hh:63
gem5::SimObject
Abstract superclass for simulation objects.
Definition:
sim_object.hh:146
gem5::SubSystem::registerPowerProducer
void registerPowerProducer(PowerModel *pm)
Definition:
sub_system.hh:70
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:37
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