misc.hh File Reference

#include "arch/arm/insts/pred_inst.hh"

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Classes
class	gem5::MrsOp
class	gem5::MsrBase
class	gem5::MsrImmOp
class	gem5::MsrRegOp
class	gem5::MrrcOp
class	gem5::McrrOp
class	gem5::ImmOp
class	gem5::RegImmOp
class	gem5::RegRegOp
class	gem5::RegOp
class	gem5::RegImmRegOp
class	gem5::RegRegRegImmOp
class	gem5::RegRegRegRegOp
class	gem5::RegRegRegOp
class	gem5::RegRegImmOp
class	gem5::MiscRegRegImmOp
class	gem5::RegMiscRegImmOp
class	gem5::RegImmImmOp
class	gem5::RegRegImmImmOp
class	gem5::RegImmRegShiftOp
class	gem5::UnknownOp
class	gem5::McrMrcMiscInst
	Certain mrc/mcr instructions act as nops or flush the pipe based on what register the instruction is trying to access. More...
class	gem5::McrMrcImplDefined
	This class is also used for IMPLEMENTATION DEFINED registers, whose mcr/mrc behaviour is trappable even for unimplemented registers. More...
class	gem5::TlbiOp

Namespaces
namespace	gem5
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