gem5
v22.0.0.2
arch
power
se_workload.cc
Go to the documentation of this file.
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/*
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* Copyright 2020 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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*/
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#include "
arch/power/se_workload.hh
"
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namespace
gem5
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{
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namespace
PowerISA
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{
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const
std::vector<int>
SEWorkload::SyscallABI::ArgumentRegs
= {
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ArgumentReg0
,
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ArgumentReg1
,
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ArgumentReg2
,
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ArgumentReg3
,
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ArgumentReg4
,
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ArgumentReg5
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};
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}
// namespace PowerISA
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}
// namespace gem5
gem5::PowerISA::ArgumentReg1
constexpr auto & ArgumentReg1
Definition:
int.hh:146
std::vector< int >
gem5::PowerISA::ArgumentReg5
constexpr auto & ArgumentReg5
Definition:
int.hh:150
gem5::PowerISA::ArgumentReg3
constexpr auto & ArgumentReg3
Definition:
int.hh:148
gem5::PowerISA::ArgumentReg0
constexpr auto & ArgumentReg0
Definition:
int.hh:145
se_workload.hh
gem5::PowerISA::SEWorkload::SyscallABI::ArgumentRegs
static const std::vector< int > ArgumentRegs
Definition:
se_workload.hh:64
gem5::PowerISA::ArgumentReg4
constexpr auto & ArgumentReg4
Definition:
int.hh:149
gem5::PowerISA::ArgumentReg2
constexpr auto & ArgumentReg2
Definition:
int.hh:147
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:37
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