gem5  v21.2.1.1
asi.hh
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28 
29 #ifndef __ARCH_SPARC_ASI_HH__
30 #define __ARCH_SPARC_ASI_HH__
31 
32 namespace gem5
33 {
34 
35 namespace SparcISA
36 {
37 
38 enum ASI
39 {
40  ASI_IMPLICIT = 0x00,
41  /* Priveleged ASIs */
42  // 0x00-0x03 implementation dependent
43  ASI_NUCLEUS = 0x4,
44  ASI_N = 0x4,
45  // 0x05-0x0B implementation dependent
46  ASI_NL = 0xC,
48  // 0x0D-0x0F implementation dependent
49  ASI_AIUP = 0x10,
51  ASI_AIUS = 0x11,
53  // 0x12-0x13 implementation dependent
54  ASI_REAL = 0x14,
55  ASI_REAL_IO = 0x15,
56  ASI_BLK_AIUP = 0x16,
58  ASI_BLK_AIUS = 0x17,
60  ASI_AIUP_L = 0x18,
62  ASI_AIUS_L = 0x19,
64  // 0x1A-0x1B implementation dependent
65  ASI_REAL_L = 0x1C,
67  ASI_REAL_IO_L = 0x1D,
74  ASI_MMU = 0x21,
75  ASI_LDTX_AIUP = 0x22,
77  ASI_LDTX_AIUS = 0x23,
79  ASI_QUAD_LDD = 0x24,
80  ASI_QUEUE = 0x25,
83  ASI_LDTX_N = 0x27,
87  // 0x28-0x29 implementation dependent
96  ASI_LTX_L = 0x2C,
98  // 0x2D implementation dependent
101  ASI_LDTX_NL = 0x2F,
103  // 0x20 implementation dependent
107  // 0x34 implementation dependent
111  // 0x38 implementation dependent
115  // 0x3C implementation dependent
121  // 0x41 implementation dependent
125  // 0x43 implementation dependent
138  ASI_IMMU = 0x50,
141  // 0x53 implementation dependent
146  ASI_DMMU = 0x58,
155  // 0x61-0x62 implementation dependent
157  // 0x64-0x65 implementation dependent
160  // 0x68-0x71 implementation dependent
164  // 0x74-0x7F reserved
165  /* Unpriveleged ASIs */
166  ASI_P = 0x80,
168  ASI_S = 0x81,
170  ASI_PNF = 0x82,
172  ASI_SNF = 0x83,
174  // 0x84-0x87 reserved
175  ASI_PL = 0x88,
177  ASI_SL = 0x89,
179  ASI_PNFL = 0x8A,
181  ASI_SNFL = 0x8B,
183  // 0x8C-0xBF reserved
184  ASI_PST8_P = 0xC0,
186  ASI_PST8_S = 0xC1,
188  ASI_PST16_P = 0xC2,
190  ASI_PST16_S = 0xC3,
192  ASI_PST32_P = 0xC4,
194  ASI_PST32_S = 0xC5,
196  // 0xC6-0xC7 implementation dependent
197  ASI_PST8_PL = 0xC8,
199  ASI_PST8_SL = 0xC9,
201  ASI_PST16_PL = 0xCA,
203  ASI_PST16_SL = 0xCB,
205  ASI_PST32_PL = 0xCC,
207  ASI_PST32_SL = 0xCD,
209  // 0xCE-0xCF implementation dependent
210  ASI_FL8_P = 0xD0,
212  ASI_FL8_S = 0xD1,
214  ASI_FL16_P = 0xD2,
216  ASI_FL16_S = 0xD3,
218  // 0xD4-0xD7 implementation dependent
219  ASI_FL8_PL = 0xD8,
221  ASI_FL8_SL = 0xD9,
223  ASI_FL16_PL = 0xDA,
225  ASI_FL16_SL = 0xDB,
227  // 0xDC-0xDF implementation dependent
228  // 0xE0-0xE1 reserved
229  ASI_LDTX_P = 0xE2,
231  ASI_LDTX_S = 0xE3,
233  // 0xE4-0xE9 implementation dependent
234  ASI_LDTX_PL = 0xEA,
236  ASI_LDTX_SL = 0xEB,
238  // 0xEC-0xEF implementation dependent
239  ASI_BLK_P = 0xF0,
241  ASI_BLK_S = 0xF1,
243  // 0xF2-0xF7 implementation dependent
244  ASI_BLK_PL = 0xF8,
246  ASI_BLK_SL = 0xF9,
248  // 0xFA-0xFF implementation dependent
249  MAX_ASI = 0xFF
250 };
251 
252 // Functions that classify an asi
253 bool asiIsBlock(ASI);
254 bool asiIsPrimary(ASI);
255 bool asiIsSecondary(ASI);
256 bool asiIsNucleus(ASI);
257 bool asiIsAsIfUser(ASI);
258 bool asiIsIO(ASI);
259 bool asiIsReal(ASI);
260 bool asiIsLittle(ASI);
261 bool asiIsTwin(ASI);
262 bool asiIsPartialStore(ASI);
263 bool asiIsFloatingLoad(ASI);
264 bool asiIsNoFault(ASI);
265 bool asiIsScratchPad(ASI);
266 bool asiIsCmt(ASI);
267 bool asiIsQueue(ASI);
268 bool asiIsDtlb(ASI);
269 bool asiIsMmu(ASI);
270 bool asiIsUnPriv(ASI);
271 bool asiIsPriv(ASI);
272 bool asiIsHPriv(ASI);
273 bool asiIsReg(ASI);
274 bool asiIsInterrupt(ASI);
275 bool asiIsSparcError(ASI);
276 };
277 
278 } // namespace gem5
279 
280 #endif // __ARCH_SPARC_ASI_HH__
gem5::SparcISA::ASI_DTLB_DATA_IN_REG
@ ASI_DTLB_DATA_IN_REG
Definition: asi.hh:150
gem5::SparcISA::ASI_BLK_AIUP
@ ASI_BLK_AIUP
Definition: asi.hh:56
gem5::SparcISA::ASI_LSU_DIAG_REG
@ ASI_LSU_DIAG_REG
Definition: asi.hh:124
gem5::SparcISA::ASI_LDTX_REAL
@ ASI_LDTX_REAL
Definition: asi.hh:82
gem5::SparcISA::ASI_DTLB_DATA_ACCESS_REG
@ ASI_DTLB_DATA_ACCESS_REG
Definition: asi.hh:151
gem5::SparcISA::ASI_DMMU_TSB_PS0_PTR_REG
@ ASI_DMMU_TSB_PS0_PTR_REG
Definition: asi.hh:147
gem5::SparcISA::ASI_BLOCK_PRIMARY
@ ASI_BLOCK_PRIMARY
Definition: asi.hh:240
gem5::SparcISA::ASI_PST16_SECONDARY
@ ASI_PST16_SECONDARY
Definition: asi.hh:191
gem5::SparcISA::ASI_INTR_RECEIVE
@ ASI_INTR_RECEIVE
Definition: asi.hh:131
gem5::SparcISA::ASI_TLB_INVALIDATE_ALL
@ ASI_TLB_INVALIDATE_ALL
Definition: asi.hh:154
gem5::SparcISA::ASI_PST32_PRIMARY
@ ASI_PST32_PRIMARY
Definition: asi.hh:193
gem5::SparcISA::ASI_SL
@ ASI_SL
Definition: asi.hh:177
gem5::SparcISA::ASI_LD_TWINX_PRIMARY
@ ASI_LD_TWINX_PRIMARY
Definition: asi.hh:230
gem5::SparcISA::ASI_SECONDARY
@ ASI_SECONDARY
Definition: asi.hh:169
gem5::SparcISA::asiIsReg
bool asiIsReg(ASI asi)
Definition: asi.cc:304
gem5::SparcISA::ASI_DMMU_TSB_PS1_PTR_REG
@ ASI_DMMU_TSB_PS1_PTR_REG
Definition: asi.hh:148
gem5::SparcISA::ASI_DMMU_DEMAP
@ ASI_DMMU_DEMAP
Definition: asi.hh:153
gem5::SparcISA::ASI_INTR_DISPATCH_STATUS
@ ASI_INTR_DISPATCH_STATUS
Definition: asi.hh:130
gem5::SparcISA::ASI_LDTX_AIUS_L
@ ASI_LDTX_AIUS_L
Definition: asi.hh:92
gem5::SparcISA::ASI_FL8_PRIMARY_LITTLE
@ ASI_FL8_PRIMARY_LITTLE
Definition: asi.hh:220
gem5::SparcISA::ASI_FL8_PRIMARY
@ ASI_FL8_PRIMARY
Definition: asi.hh:211
gem5::SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS1
@ ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS1
Definition: asi.hh:117
gem5::SparcISA::ASI_LDTX_AIUP_L
@ ASI_LDTX_AIUP_L
Definition: asi.hh:88
gem5::SparcISA::asiIsDtlb
bool asiIsDtlb(ASI)
gem5::SparcISA::ASI_SWVR_UDB_INTR_R
@ ASI_SWVR_UDB_INTR_R
Definition: asi.hh:163
gem5::SparcISA::asiIsHPriv
bool asiIsHPriv(ASI asi)
Definition: asi.cc:298
gem5::SparcISA::ASI_PST8_SECONDARY
@ ASI_PST8_SECONDARY
Definition: asi.hh:187
gem5::SparcISA::ASI_SPARC_ERROR_EN_REG
@ ASI_SPARC_ERROR_EN_REG
Definition: asi.hh:133
gem5::SparcISA::ASI_BLK_P
@ ASI_BLK_P
Definition: asi.hh:239
gem5::SparcISA::ASI_TWINX_AS_IF_USER_PRIMARY_LITTLE
@ ASI_TWINX_AS_IF_USER_PRIMARY_LITTLE
Definition: asi.hh:89
gem5::SparcISA::ASI_PST32_SECONDARY_LITTLE
@ ASI_PST32_SECONDARY_LITTLE
Definition: asi.hh:208
gem5::SparcISA::ASI_REAL_L
@ ASI_REAL_L
Definition: asi.hh:65
gem5::SparcISA::ASI_LD_TWINX_SECONDARY_LITTLE
@ ASI_LD_TWINX_SECONDARY_LITTLE
Definition: asi.hh:237
gem5::SparcISA::asiIsSecondary
bool asiIsSecondary(ASI asi)
Definition: asi.cc:80
gem5::SparcISA::asiIsCmt
bool asiIsCmt(ASI asi)
Definition: asi.cc:249
gem5::SparcISA::ASI_BLK_AIUS
@ ASI_BLK_AIUS
Definition: asi.hh:58
gem5::SparcISA::ASI_IMMU_TSB_PS0_PTR_REG
@ ASI_IMMU_TSB_PS0_PTR_REG
Definition: asi.hh:139
gem5::SparcISA::ASI_PST8_S
@ ASI_PST8_S
Definition: asi.hh:186
gem5::SparcISA::ASI_FL8_SECONDARY_LITTLE
@ ASI_FL8_SECONDARY_LITTLE
Definition: asi.hh:222
gem5::SparcISA::ASI_PST32_P
@ ASI_PST32_P
Definition: asi.hh:192
gem5::SparcISA::ASI_AS_IF_USER_PRIMARY_LITTLE
@ ASI_AS_IF_USER_PRIMARY_LITTLE
Definition: asi.hh:61
gem5::SparcISA::MAX_ASI
@ MAX_ASI
Definition: asi.hh:249
gem5::SparcISA::ASI_FL8_S
@ ASI_FL8_S
Definition: asi.hh:212
gem5::SparcISA::ASI_PST16_PL
@ ASI_PST16_PL
Definition: asi.hh:201
gem5::SparcISA::ASI_PST32_SL
@ ASI_PST32_SL
Definition: asi.hh:207
gem5::SparcISA::asiIsPartialStore
bool asiIsPartialStore(ASI asi)
Definition: asi.cc:203
gem5::SparcISA::asiIsLittle
bool asiIsLittle(ASI asi)
Definition: asi.cc:153
gem5::SparcISA::ASI_BLOCK_SECONDARY_LITTLE
@ ASI_BLOCK_SECONDARY_LITTLE
Definition: asi.hh:247
gem5::SparcISA::ASI_LSU_CONTROL_REG
@ ASI_LSU_CONTROL_REG
Definition: asi.hh:127
gem5::SparcISA::ASI_PRIMARY_NO_FAULT
@ ASI_PRIMARY_NO_FAULT
Definition: asi.hh:171
gem5::SparcISA::ASI_LDTX_N
@ ASI_LDTX_N
Definition: asi.hh:83
gem5::SparcISA::ASI_SECONDARY_LITTLE
@ ASI_SECONDARY_LITTLE
Definition: asi.hh:178
gem5::SparcISA::ASI_DMMU
@ ASI_DMMU
Definition: asi.hh:146
gem5::SparcISA::ASI_BLOCK_AS_IF_USER_SECONDARY
@ ASI_BLOCK_AS_IF_USER_SECONDARY
Definition: asi.hh:59
gem5::SparcISA::asiIsNoFault
bool asiIsNoFault(ASI asi)
Definition: asi.cc:233
gem5::SparcISA::ASI_LDTX_REAL_L
@ ASI_LDTX_REAL_L
Definition: asi.hh:99
gem5::SparcISA::ASI_PNF
@ ASI_PNF
Definition: asi.hh:170
gem5::SparcISA::ASI_LDTX_AIUP
@ ASI_LDTX_AIUP
Definition: asi.hh:75
gem5::SparcISA::ASI_AS_IF_USER_PRIMARY
@ ASI_AS_IF_USER_PRIMARY
Definition: asi.hh:50
gem5::SparcISA::ASI_PL
@ ASI_PL
Definition: asi.hh:175
gem5::SparcISA::asiIsQueue
bool asiIsQueue(ASI asi)
Definition: asi.cc:256
gem5::SparcISA::ASI_PST32_S
@ ASI_PST32_S
Definition: asi.hh:194
gem5::SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS0
@ ASI_DMMU_CTXT_ZERO_TSB_BASE_PS0
Definition: asi.hh:104
gem5::SparcISA::ASI_NUCLEUS
@ ASI_NUCLEUS
Definition: asi.hh:43
gem5::SparcISA::ASI_PST8_SECONDARY_LITTLE
@ ASI_PST8_SECONDARY_LITTLE
Definition: asi.hh:200
gem5::SparcISA::ASI_LD_TWINX_NUCLEUS_LITTLE
@ ASI_LD_TWINX_NUCLEUS_LITTLE
Definition: asi.hh:102
gem5::SparcISA::ASI_BLOCK_AS_IF_USER_PRIMARY
@ ASI_BLOCK_AS_IF_USER_PRIMARY
Definition: asi.hh:57
gem5::SparcISA::ASI_ICACHE_INSTR
@ ASI_ICACHE_INSTR
Definition: asi.hh:158
gem5::SparcISA::ASI_IMMU_DEMAP
@ ASI_IMMU_DEMAP
Definition: asi.hh:145
gem5::SparcISA::ASI_PST16_P
@ ASI_PST16_P
Definition: asi.hh:188
gem5::SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS0
@ ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS0
Definition: asi.hh:116
gem5::SparcISA::ASI_AIUS_L
@ ASI_AIUS_L
Definition: asi.hh:62
gem5::SparcISA::ASI_LD_TWINX_AS_IF_USER_PRIMARY
@ ASI_LD_TWINX_AS_IF_USER_PRIMARY
Definition: asi.hh:76
gem5::SparcISA::ASI_INST_MASK_REG
@ ASI_INST_MASK_REG
Definition: asi.hh:123
gem5::SparcISA::ASI_AS_IF_USER_SECONDARY_LITTLE
@ ASI_AS_IF_USER_SECONDARY_LITTLE
Definition: asi.hh:63
gem5::SparcISA::ASI_BLK_SL
@ ASI_BLK_SL
Definition: asi.hh:246
gem5::SparcISA::ASI_NUCLEUS_LITTLE
@ ASI_NUCLEUS_LITTLE
Definition: asi.hh:47
gem5::SparcISA::ASI_LDTX_NL
@ ASI_LDTX_NL
Definition: asi.hh:101
gem5::SparcISA::ASI_LDTX_PL
@ ASI_LDTX_PL
Definition: asi.hh:234
gem5::SparcISA::ASI_DCACHE_DATA
@ ASI_DCACHE_DATA
Definition: asi.hh:128
gem5::SparcISA::ASI_BLK_PL
@ ASI_BLK_PL
Definition: asi.hh:244
gem5::SparcISA::ASI_IMMU_CTXT_ZERO_CONFIG
@ ASI_IMMU_CTXT_ZERO_CONFIG
Definition: asi.hh:110
gem5::SparcISA::asiIsIO
bool asiIsIO(ASI asi)
Definition: asi.cc:135
gem5::SparcISA::ASI_ST_BLKINIT_AS_IF_USER_SECONDARY_LITTLE
@ ASI_ST_BLKINIT_AS_IF_USER_SECONDARY_LITTLE
Definition: asi.hh:94
gem5::SparcISA::ASI_AIUP_L
@ ASI_AIUP_L
Definition: asi.hh:60
gem5::SparcISA::ASI_STBI_N
@ ASI_STBI_N
Definition: asi.hh:86
gem5::SparcISA::ASI_ECACHE_TAG_DATA
@ ASI_ECACHE_TAG_DATA
Definition: asi.hh:136
gem5::SparcISA::asiIsInterrupt
bool asiIsInterrupt(ASI asi)
Definition: asi.cc:262
gem5::SparcISA::ASI_SPARC_ERROR_ADDRESS_REG
@ ASI_SPARC_ERROR_ADDRESS_REG
Definition: asi.hh:135
gem5::SparcISA::ASI_LDTX_AIUS
@ ASI_LDTX_AIUS
Definition: asi.hh:77
gem5::SparcISA::ASI_FL16_PRIMARY
@ ASI_FL16_PRIMARY
Definition: asi.hh:215
gem5::SparcISA::ASI_ICACHE_TAG
@ ASI_ICACHE_TAG
Definition: asi.hh:159
gem5::SparcISA::ASI_LDTX_S
@ ASI_LDTX_S
Definition: asi.hh:231
gem5::SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS0
@ ASI_IMMU_CTXT_ZERO_TSB_BASE_PS0
Definition: asi.hh:108
gem5::SparcISA::ASI_SECONDARY_NO_FAULT_LITTLE
@ ASI_SECONDARY_NO_FAULT_LITTLE
Definition: asi.hh:182
gem5::SparcISA::ASI_FL8_SL
@ ASI_FL8_SL
Definition: asi.hh:221
gem5::SparcISA::ASI_NL
@ ASI_NL
Definition: asi.hh:46
gem5::SparcISA::ASI_DMMU_CTXT_ZERO_CONFIG
@ ASI_DMMU_CTXT_ZERO_CONFIG
Definition: asi.hh:106
gem5::SparcISA::asiIsMmu
bool asiIsMmu(ASI asi)
Definition: asi.cc:270
gem5::SparcISA::ASI_LDTX_SL
@ ASI_LDTX_SL
Definition: asi.hh:236
gem5::SparcISA::ASI_STM_CTL_REG
@ ASI_STM_CTL_REG
Definition: asi.hh:126
gem5::SparcISA::ASI_SPARC_BIST_CONTROL
@ ASI_SPARC_BIST_CONTROL
Definition: asi.hh:122
gem5::SparcISA::ASI_PST8_PL
@ ASI_PST8_PL
Definition: asi.hh:197
gem5::SparcISA::ASI_BLK_AIUS_L
@ ASI_BLK_AIUS_L
Definition: asi.hh:71
gem5::SparcISA::ASI_PST32_PRIMARY_LITTLE
@ ASI_PST32_PRIMARY_LITTLE
Definition: asi.hh:206
gem5::SparcISA::ASI_LD_TWINX_SECONDARY
@ ASI_LD_TWINX_SECONDARY
Definition: asi.hh:232
gem5::SparcISA::asiIsScratchPad
bool asiIsScratchPad(ASI asi)
Definition: asi.cc:242
gem5::SparcISA::ASI_STBI_AIUP_L
@ ASI_STBI_AIUP_L
Definition: asi.hh:91
gem5::SparcISA::ASI_FL16_SL
@ ASI_FL16_SL
Definition: asi.hh:225
gem5::SparcISA::ASI_TWINX_LITTLE
@ ASI_TWINX_LITTLE
Definition: asi.hh:97
gem5::SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0
@ ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0
Definition: asi.hh:112
gem5::SparcISA::asiIsPrimary
bool asiIsPrimary(ASI asi)
Definition: asi.cc:51
gem5::SparcISA::ASI_DMMU_TSB_DIRECT_PTR_REG
@ ASI_DMMU_TSB_DIRECT_PTR_REG
Definition: asi.hh:149
gem5::SparcISA::ASI_ST_BLKINIT_AS_IF_USER_PRIMARY_LITTLE
@ ASI_ST_BLKINIT_AS_IF_USER_PRIMARY_LITTLE
Definition: asi.hh:90
gem5::SparcISA::ASI_FL16_P
@ ASI_FL16_P
Definition: asi.hh:214
gem5::SparcISA::ASI_CMT_PER_STRAND
@ ASI_CMT_PER_STRAND
Definition: asi.hh:156
gem5::SparcISA::ASI_REAL_IO_LITTLE
@ ASI_REAL_IO_LITTLE
Definition: asi.hh:68
gem5::SparcISA::ASI_IMMU
@ ASI_IMMU
Definition: asi.hh:138
gem5::SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS1
@ ASI_IMMU_CTXT_ZERO_TSB_BASE_PS1
Definition: asi.hh:109
gem5::SparcISA::ASI_LD_TWINX_AS_IF_USER_SECONDARY_LITTLE
@ ASI_LD_TWINX_AS_IF_USER_SECONDARY_LITTLE
Definition: asi.hh:93
gem5::SparcISA::ASI_REAL_IO_L
@ ASI_REAL_IO_L
Definition: asi.hh:67
gem5::SparcISA::asiIsAsIfUser
bool asiIsAsIfUser(ASI asi)
Definition: asi.cc:118
gem5::SparcISA::ASI_BLK_S
@ ASI_BLK_S
Definition: asi.hh:241
gem5::SparcISA::ASI_REAL_IO
@ ASI_REAL_IO
Definition: asi.hh:55
gem5::SparcISA::ASI_ITLB_DATA_ACCESS_REG
@ ASI_ITLB_DATA_ACCESS_REG
Definition: asi.hh:143
gem5::SparcISA::ASI_IMPLICIT
@ ASI_IMPLICIT
Definition: asi.hh:40
gem5::SparcISA::ASI_AIUP
@ ASI_AIUP
Definition: asi.hh:49
gem5::SparcISA::ASI_PRIMARY
@ ASI_PRIMARY
Definition: asi.hh:167
gem5::SparcISA::ASI_N
@ ASI_N
Definition: asi.hh:44
gem5::SparcISA::ASI_PST16_PRIMARY
@ ASI_PST16_PRIMARY
Definition: asi.hh:189
gem5::SparcISA::ASI_CMT_SHARED
@ ASI_CMT_SHARED
Definition: asi.hh:120
gem5::SparcISA::ASI_ST_BLKINIT_NUCLEUS
@ ASI_ST_BLKINIT_NUCLEUS
Definition: asi.hh:85
gem5::SparcISA::ASI_LTX_L
@ ASI_LTX_L
Definition: asi.hh:96
gem5::SparcISA::ASI_PST32_SECONDARY
@ ASI_PST32_SECONDARY
Definition: asi.hh:195
gem5::SparcISA::ASI_REAL
@ ASI_REAL
Definition: asi.hh:54
gem5::SparcISA::ASI_DCACHE_TAG
@ ASI_DCACHE_TAG
Definition: asi.hh:129
gem5::SparcISA::ASI_FL16_SECONDARY
@ ASI_FL16_SECONDARY
Definition: asi.hh:217
gem5::SparcISA::ASI_SWVR_INTR_RECEIVE
@ ASI_SWVR_INTR_RECEIVE
Definition: asi.hh:161
gem5::SparcISA::ASI_SECONDARY_NO_FAULT
@ ASI_SECONDARY_NO_FAULT
Definition: asi.hh:173
gem5::SparcISA::ASI_FL16_PRIMARY_LITTLE
@ ASI_FL16_PRIMARY_LITTLE
Definition: asi.hh:224
gem5::SparcISA::ASI_PST16_SL
@ ASI_PST16_SL
Definition: asi.hh:203
gem5::SparcISA::ASI_PST8_P
@ ASI_PST8_P
Definition: asi.hh:184
gem5::SparcISA::ASI_MMU
@ ASI_MMU
Definition: asi.hh:74
gem5::SparcISA::ASI_IMMU_CTXT_NONZERO_CONFIG
@ ASI_IMMU_CTXT_NONZERO_CONFIG
Definition: asi.hh:118
gem5::SparcISA::ASI_BLK_AIUP_L
@ ASI_BLK_AIUP_L
Definition: asi.hh:69
gem5::SparcISA::ASI_FL16_SECONDARY_LITTLE
@ ASI_FL16_SECONDARY_LITTLE
Definition: asi.hh:226
gem5::SparcISA::ASI_PST16_SECONDARY_LITTLE
@ ASI_PST16_SECONDARY_LITTLE
Definition: asi.hh:204
gem5::SparcISA::ASI_QUAD_LDD_REAL
@ ASI_QUAD_LDD_REAL
Definition: asi.hh:81
gem5::SparcISA::asiIsReal
bool asiIsReal(ASI asi)
Definition: asi.cc:142
gem5::SparcISA::ASI_FL16_S
@ ASI_FL16_S
Definition: asi.hh:216
gem5::SparcISA::ASI_FL8_P
@ ASI_FL8_P
Definition: asi.hh:210
gem5::SparcISA::ASI_PRIMARY_NO_FAULT_LITTLE
@ ASI_PRIMARY_NO_FAULT_LITTLE
Definition: asi.hh:180
gem5::SparcISA::ASI_HYP_SCRATCHPAD
@ ASI_HYP_SCRATCHPAD
Definition: asi.hh:137
gem5::SparcISA::ASI_DMMU_CTXT_NONZERO_CONFIG
@ ASI_DMMU_CTXT_NONZERO_CONFIG
Definition: asi.hh:114
gem5::SparcISA::ASI_UPA_CONFIG_REGISTER
@ ASI_UPA_CONFIG_REGISTER
Definition: asi.hh:132
gem5::SparcISA::ASI_LD_TWINX_PRIMARY_LITTLE
@ ASI_LD_TWINX_PRIMARY_LITTLE
Definition: asi.hh:235
gem5::SparcISA::asiIsTwin
bool asiIsTwin(ASI asi)
Definition: asi.cc:188
gem5::SparcISA::ASI_STREAM_MA
@ ASI_STREAM_MA
Definition: asi.hh:119
gem5::SparcISA::ASI_SNFL
@ ASI_SNFL
Definition: asi.hh:181
gem5::SparcISA::ASI_PRIMARY_LITTLE
@ ASI_PRIMARY_LITTLE
Definition: asi.hh:176
gem5::SparcISA::ASI_PST8_PRIMARY
@ ASI_PST8_PRIMARY
Definition: asi.hh:185
gem5::SparcISA::ASI_AS_IF_USER_SECONDARY
@ ASI_AS_IF_USER_SECONDARY
Definition: asi.hh:52
gem5::SparcISA::ASI_PST8_PRIMARY_LITTLE
@ ASI_PST8_PRIMARY_LITTLE
Definition: asi.hh:198
gem5::SparcISA::ASI_PST16_PRIMARY_LITTLE
@ ASI_PST16_PRIMARY_LITTLE
Definition: asi.hh:202
gem5::SparcISA::ASI
ASI
Definition: asi.hh:38
gem5::SparcISA::ASI_SPARC_ERROR_STATUS_REG
@ ASI_SPARC_ERROR_STATUS_REG
Definition: asi.hh:134
gem5::SparcISA::ASI_BLOCK_SECONDARY
@ ASI_BLOCK_SECONDARY
Definition: asi.hh:242
gem5::SparcISA::ASI_ITLB_TAG_READ_REG
@ ASI_ITLB_TAG_READ_REG
Definition: asi.hh:144
gem5::SparcISA::ASI_FL8_PL
@ ASI_FL8_PL
Definition: asi.hh:219
gem5::SparcISA::asiIsUnPriv
bool asiIsUnPriv(ASI asi)
Definition: asi.cc:285
gem5::SparcISA::asiIsBlock
bool asiIsBlock(ASI asi)
Definition: asi.cc:38
gem5::SparcISA::ASI_P
@ ASI_P
Definition: asi.hh:166
gem5::SparcISA::ASI_LD_TWINX_NUCLEUS
@ ASI_LD_TWINX_NUCLEUS
Definition: asi.hh:84
gem5::SparcISA::ASI_FL16_PL
@ ASI_FL16_PL
Definition: asi.hh:223
gem5::SparcISA::ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE
@ ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE
Definition: asi.hh:72
gem5::SparcISA::ASI_DTLB_TAG_READ_REG
@ ASI_DTLB_TAG_READ_REG
Definition: asi.hh:152
gem5::SparcISA::asiIsFloatingLoad
bool asiIsFloatingLoad(ASI asi)
Definition: asi.cc:220
gem5::SparcISA::ASI_REAL_LITTLE
@ ASI_REAL_LITTLE
Definition: asi.hh:66
gem5::SparcISA::ASI_IMMU_TSB_PS1_PTR_REG
@ ASI_IMMU_TSB_PS1_PTR_REG
Definition: asi.hh:140
gem5::SparcISA::ASI_QUEUE
@ ASI_QUEUE
Definition: asi.hh:80
gem5::SparcISA::ASI_PNFL
@ ASI_PNFL
Definition: asi.hh:179
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::SparcISA::ASI_SNF
@ ASI_SNF
Definition: asi.hh:172
gem5::SparcISA::ASI_LDTX_P
@ ASI_LDTX_P
Definition: asi.hh:229
gem5::SparcISA::ASI_PST16_S
@ ASI_PST16_S
Definition: asi.hh:190
gem5::SparcISA::asiIsNucleus
bool asiIsNucleus(ASI asi)
Definition: asi.cc:109
gem5::SparcISA::ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE
@ ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE
Definition: asi.hh:70
gem5::SparcISA::ASI_BLOCK_PRIMARY_LITTLE
@ ASI_BLOCK_PRIMARY_LITTLE
Definition: asi.hh:245
gem5::SparcISA::ASI_PST8_SL
@ ASI_PST8_SL
Definition: asi.hh:199
gem5::SparcISA::ASI_SWVR_UDB_INTR_W
@ ASI_SWVR_UDB_INTR_W
Definition: asi.hh:162
gem5::SparcISA::asiIsPriv
bool asiIsPriv(ASI asi)
Definition: asi.cc:291
gem5::SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS1
@ ASI_DMMU_CTXT_ZERO_TSB_BASE_PS1
Definition: asi.hh:105
gem5::SparcISA::ASI_LD_TWINX_REAL_LITTLE
@ ASI_LD_TWINX_REAL_LITTLE
Definition: asi.hh:100
gem5::SparcISA::ASI_STBI_AIUS_L
@ ASI_STBI_AIUS_L
Definition: asi.hh:95
gem5::SparcISA::ASI_AIUS
@ ASI_AIUS
Definition: asi.hh:51
gem5::SparcISA::ASI_S
@ ASI_S
Definition: asi.hh:168
gem5::SparcISA::ASI_SCRATCHPAD
@ ASI_SCRATCHPAD
Definition: asi.hh:73
gem5::SparcISA::ASI_LD_TWINX_AS_IF_USER_SECONDARY
@ ASI_LD_TWINX_AS_IF_USER_SECONDARY
Definition: asi.hh:78
gem5::SparcISA::asiIsSparcError
bool asiIsSparcError(ASI asi)
Definition: asi.cc:312
gem5::SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS1
@ ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS1
Definition: asi.hh:113
gem5::SparcISA::ASI_ITLB_DATA_IN_REG
@ ASI_ITLB_DATA_IN_REG
Definition: asi.hh:142
gem5::SparcISA::ASI_PST32_PL
@ ASI_PST32_PL
Definition: asi.hh:205
gem5::SparcISA::ASI_QUAD_LDD
@ ASI_QUAD_LDD
Definition: asi.hh:79
gem5::SparcISA::ASI_FL8_SECONDARY
@ ASI_FL8_SECONDARY
Definition: asi.hh:213

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