This is the complete list of members for gem5::ArmISA::SelfDebug, including all inherited members.
aarch32 | gem5::ArmISA::SelfDebug | private |
activateDebug() | gem5::ArmISA::SelfDebug | inline |
arBrkPoints | gem5::ArmISA::SelfDebug | private |
arWatchPoints | gem5::ArmISA::SelfDebug | private |
enabled() const | gem5::ArmISA::SelfDebug | inline |
enableTdeTge | gem5::ArmISA::SelfDebug | private |
getBrkPoint(uint8_t index) | gem5::ArmISA::SelfDebug | inline |
getSstep() | gem5::ArmISA::SelfDebug | inline |
init(ThreadContext *tc) | gem5::ArmISA::SelfDebug | |
isAArch32() const | gem5::ArmISA::SelfDebug | inline |
isDebugEnabled(ThreadContext *tc) | gem5::ArmISA::SelfDebug | inline |
isDebugEnabledForEL32(ThreadContext *tc, ExceptionLevel el, bool secure, bool mask) | gem5::ArmISA::SelfDebug | |
isDebugEnabledForEL64(ThreadContext *tc, ExceptionLevel el, bool secure, bool mask) | gem5::ArmISA::SelfDebug | |
kde | gem5::ArmISA::SelfDebug | private |
mde | gem5::ArmISA::SelfDebug | private |
oslk | gem5::ArmISA::SelfDebug | private |
sdd | gem5::ArmISA::SelfDebug | private |
securityStateMatch(ThreadContext *tc, uint8_t ssc, bool hmc) | gem5::ArmISA::SelfDebug | inlinestatic |
SelfDebug() | gem5::ArmISA::SelfDebug | inline |
setAArch32(ThreadContext *tc) | gem5::ArmISA::SelfDebug | inline |
setbSDD(RegVal val) | gem5::ArmISA::SelfDebug | inline |
setDebugMask(bool mask) | gem5::ArmISA::SelfDebug | inline |
setenableTDETGE(HCR hcr, HDCR mdcr) | gem5::ArmISA::SelfDebug | inline |
setMDBGen(RegVal val) | gem5::ArmISA::SelfDebug | inline |
setMDSCRvals(RegVal val) | gem5::ArmISA::SelfDebug | inline |
softStep | gem5::ArmISA::SelfDebug | private |
targetAArch32(ThreadContext *tc) | gem5::ArmISA::SelfDebug | inline |
testBreakPoints(ThreadContext *tc, Addr vaddr) | gem5::ArmISA::SelfDebug | protected |
testDebug(ThreadContext *tc, const RequestPtr &req, BaseMMU::Mode mode) | gem5::ArmISA::SelfDebug | |
testWatchPoints(ThreadContext *tc, Addr vaddr, bool write, bool atomic, unsigned size, bool cm) | gem5::ArmISA::SelfDebug | protected |
to32 | gem5::ArmISA::SelfDebug | private |
triggerException(ThreadContext *tc, Addr vaddr) | gem5::ArmISA::SelfDebug | protected |
triggerWatchpointException(ThreadContext *tc, Addr vaddr, bool write, bool cm) | gem5::ArmISA::SelfDebug | protected |
updateDBGBCR(int index, DBGBCR val) | gem5::ArmISA::SelfDebug | inline |
updateDBGWCR(int index, DBGWCR val) | gem5::ArmISA::SelfDebug | inline |
updateOSLock(RegVal val) | gem5::ArmISA::SelfDebug | inline |
~SelfDebug() | gem5::ArmISA::SelfDebug | inline |