gem5  v21.2.0.0
gem5::ArmISA::SelfDebug Member List

This is the complete list of members for gem5::ArmISA::SelfDebug, including all inherited members.

aarch32gem5::ArmISA::SelfDebugprivate
activateDebug()gem5::ArmISA::SelfDebuginline
arBrkPointsgem5::ArmISA::SelfDebugprivate
arWatchPointsgem5::ArmISA::SelfDebugprivate
enabled() constgem5::ArmISA::SelfDebuginline
enableTdeTgegem5::ArmISA::SelfDebugprivate
getBrkPoint(uint8_t index)gem5::ArmISA::SelfDebuginline
getSstep()gem5::ArmISA::SelfDebuginline
getVectorCatch(ThreadContext *tc)gem5::ArmISA::SelfDebuginline
init(ThreadContext *tc)gem5::ArmISA::SelfDebug
initializedgem5::ArmISA::SelfDebugprivate
isAArch32() constgem5::ArmISA::SelfDebuginline
isDebugEnabled(ThreadContext *tc)gem5::ArmISA::SelfDebuginline
isDebugEnabledForEL32(ThreadContext *tc, ExceptionLevel el, bool secure, bool mask)gem5::ArmISA::SelfDebug
isDebugEnabledForEL64(ThreadContext *tc, ExceptionLevel el, bool secure, bool mask)gem5::ArmISA::SelfDebug
kdegem5::ArmISA::SelfDebugprivate
mdegem5::ArmISA::SelfDebugprivate
oslkgem5::ArmISA::SelfDebugprivate
sddgem5::ArmISA::SelfDebugprivate
securityStateMatch(ThreadContext *tc, uint8_t ssc, bool hmc)gem5::ArmISA::SelfDebuginlinestatic
SelfDebug()gem5::ArmISA::SelfDebuginline
setAArch32(ThreadContext *tc)gem5::ArmISA::SelfDebuginline
setbSDD(RegVal val)gem5::ArmISA::SelfDebuginline
setDebugMask(bool mask)gem5::ArmISA::SelfDebuginline
setenableTDETGE(HCR hcr, HDCR mdcr)gem5::ArmISA::SelfDebuginline
setMDBGen(RegVal val)gem5::ArmISA::SelfDebuginline
setMDSCRvals(RegVal val)gem5::ArmISA::SelfDebuginline
softStepgem5::ArmISA::SelfDebugprivate
targetAArch32(ThreadContext *tc)gem5::ArmISA::SelfDebuginline
testBreakPoints(ThreadContext *tc, Addr vaddr)gem5::ArmISA::SelfDebugprotected
testDebug(ThreadContext *tc, const RequestPtr &req, BaseMMU::Mode mode)gem5::ArmISA::SelfDebug
testVectorCatch(ThreadContext *tc, Addr addr, ArmFault *flt)gem5::ArmISA::SelfDebug
testWatchPoints(ThreadContext *tc, Addr vaddr, bool write, bool atomic, unsigned size, bool cm)gem5::ArmISA::SelfDebugprotected
to32gem5::ArmISA::SelfDebugprivate
triggerException(ThreadContext *tc, Addr vaddr)gem5::ArmISA::SelfDebugprotected
triggerWatchpointException(ThreadContext *tc, Addr vaddr, bool write, bool cm)gem5::ArmISA::SelfDebugprotected
updateDBGBCR(int index, DBGBCR val)gem5::ArmISA::SelfDebuginline
updateDBGWCR(int index, DBGWCR val)gem5::ArmISA::SelfDebuginline
updateOSLock(RegVal val)gem5::ArmISA::SelfDebuginline
vcExcptgem5::ArmISA::SelfDebugprivate
~SelfDebug()gem5::ArmISA::SelfDebuginline

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