gem5  v22.1.0.0
gem5::RiscvISA::PCState Member List

This is the complete list of members for gem5::RiscvISA::PCState, including all inherited members.

_compressedgem5::RiscvISA::PCStateprivate
_npcgem5::GenericISA::PCStateWithNextprotected
_nupcgem5::GenericISA::PCStateWithNextprotected
_pcgem5::PCStateBaseprotected
_rv32gem5::RiscvISA::PCStateprivate
_upcgem5::PCStateBaseprotected
advance() overridegem5::GenericISA::SimplePCState< InstWidth >inlinevirtual
as()gem5::PCStateBaseinline
as() constgem5::PCStateBaseinline
Base typedefgem5::GenericISA::UPCState< 4 >protected
branching() const overridegem5::RiscvISA::PCStateinlinevirtual
clone() const overridegem5::RiscvISA::PCStateinlinevirtual
compressed(bool c)gem5::RiscvISA::PCStateinline
compressed() constgem5::RiscvISA::PCStateinline
currentSection()gem5::Serializablestatic
equals(const PCStateBase &other) const overridegem5::GenericISA::PCStateWithNextinlinevirtual
generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream)gem5::Serializablestatic
instAddr() constgem5::PCStateBaseinline
microPC() constgem5::PCStateBaseinline
npc() constgem5::GenericISA::PCStateWithNextinline
npc(Addr val)gem5::GenericISA::PCStateWithNextinline
nupc() constgem5::GenericISA::PCStateWithNextinline
nupc(MicroPC val)gem5::GenericISA::PCStateWithNextinline
operator=(const UPCState &other)=defaultgem5::GenericISA::UPCState< 4 >
gem5::GenericISA::SimplePCState::operator=(const SimplePCState &other)=defaultgem5::GenericISA::SimplePCState< InstWidth >
gem5::GenericISA::PCStateWithNext::operator=(const PCStateWithNext &other)=defaultgem5::GenericISA::PCStateWithNextprotected
gem5::PCStateBase::operator=(const PCStateBase &other)=defaultgem5::PCStateBaseprotected
output(std::ostream &os) const overridegem5::GenericISA::UPCState< 4 >inlinevirtual
pathgem5::Serializableprivatestatic
pc() constgem5::GenericISA::PCStateWithNextinline
pc(Addr val)gem5::GenericISA::PCStateWithNextinline
PCStateBase(const PCStateBase &other)gem5::PCStateBaseinlineprotected
PCStateBase()gem5::PCStateBaseinlineprotected
PCStateWithNext(const PCStateWithNext &other)gem5::GenericISA::PCStateWithNextinlineprotected
PCStateWithNext()gem5::GenericISA::PCStateWithNextinlineprotected
rv32(bool val)gem5::RiscvISA::PCStateinline
rv32() constgem5::RiscvISA::PCStateinline
Serializable()gem5::Serializable
serialize(CheckpointOut &cp) const overridegem5::GenericISA::PCStateWithNextinlinevirtual
serializeSection(CheckpointOut &cp, const char *name) constgem5::Serializable
serializeSection(CheckpointOut &cp, const std::string &name) constgem5::Serializableinline
set(Addr val)gem5::GenericISA::UPCState< 4 >inline
setNPC(Addr val)gem5::GenericISA::PCStateWithNextinline
SimplePCState(const SimplePCState &other)gem5::GenericISA::SimplePCState< InstWidth >inline
SimplePCState()gem5::GenericISA::SimplePCState< InstWidth >inline
SimplePCState(Addr val)gem5::GenericISA::SimplePCState< InstWidth >inlineexplicit
uAdvance()gem5::GenericISA::UPCState< 4 >inline
uEnd()gem5::GenericISA::UPCState< 4 >inline
unserialize(CheckpointIn &cp) overridegem5::GenericISA::PCStateWithNextinlinevirtual
unserializeSection(CheckpointIn &cp, const char *name)gem5::Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)gem5::Serializableinline
upc() constgem5::GenericISA::PCStateWithNextinline
upc(MicroPC val)gem5::GenericISA::PCStateWithNextinline
UPCState(const UPCState &other)gem5::GenericISA::UPCState< 4 >inline
UPCState()gem5::GenericISA::UPCState< 4 >inline
UPCState(Addr val)gem5::GenericISA::UPCState< 4 >inlineexplicit
update(const PCStateBase &other) overridegem5::RiscvISA::PCStateinlinevirtual
gem5::PCStateBase::update(const PCStateBase *ptr)gem5::PCStateBaseinline
uReset() overridegem5::GenericISA::PCStateWithNextinlinevirtual
~PCStateBase()=defaultgem5::PCStateBasevirtual
~Serializable()gem5::Serializablevirtual

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