gem5  v21.2.1.1
Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
gem5::PCStateBase Class Referenceabstract

#include <pcstate.hh>

Inheritance diagram for gem5::PCStateBase:
gem5::Serializable gem5::GenericISA::PCStateWithNext gem5::GenericISA::SimplePCState< InstWidth > gem5::GenericISA::SimplePCState< 4 > gem5::GenericISA::DelaySlotPCState< 4 > gem5::GenericISA::DelaySlotPCState< InstWidth > gem5::GenericISA::UPCState< InstWidth > gem5::GenericISA::UPCState< 4 > gem5::GenericISA::UPCState< 8 > gem5::PowerISA::PCState gem5::GenericISA::DelaySlotUPCState< InstWidth > gem5::RiscvISA::PCState gem5::X86ISA::PCState

Public Member Functions

virtual ~PCStateBase ()=default
 
template<class Target >
Target & as ()
 
template<class Target >
const Target & as () const
 
virtual PCStateBaseclone () const =0
 
virtual void update (const PCStateBase &other)
 
void update (const PCStateBase *ptr)
 
virtual void output (std::ostream &os) const =0
 
virtual bool equals (const PCStateBase &other) const
 
Addr instAddr () const
 Returns the memory address of the instruction this PC points to. More...
 
MicroPC microPC () const
 Returns the current micropc. More...
 
virtual void uReset ()
 
virtual void advance ()=0
 
virtual bool branching () const =0
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 

Protected Member Functions

 PCStateBase (const PCStateBase &other)
 
PCStateBaseoperator= (const PCStateBase &other)=default
 
 PCStateBase ()
 

Protected Attributes

Addr _pc = 0
 
MicroPC _upc = 0
 

Additional Inherited Members

- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 

Detailed Description

Definition at line 57 of file pcstate.hh.

Constructor & Destructor Documentation

◆ PCStateBase() [1/2]

gem5::PCStateBase::PCStateBase ( const PCStateBase other)
inlineprotected

Definition at line 63 of file pcstate.hh.

◆ PCStateBase() [2/2]

gem5::PCStateBase::PCStateBase ( )
inlineprotected

Definition at line 65 of file pcstate.hh.

◆ ~PCStateBase()

virtual gem5::PCStateBase::~PCStateBase ( )
virtualdefault

Member Function Documentation

◆ advance()

virtual void gem5::PCStateBase::advance ( )
pure virtual

◆ as() [1/2]

template<class Target >
Target& gem5::PCStateBase::as ( )
inline

Definition at line 72 of file pcstate.hh.

Referenced by gem5::ArmISA::MightBeMicro::advancePC(), gem5::RiscvISA::RiscvStaticInst::advancePC(), gem5::PowerISA::PowerStaticInst::advancePC(), gem5::ArmISA::MicroOp::advancePC(), gem5::ArmISA::MightBeMicro64::advancePC(), gem5::SparcISA::SparcMicroInst::advancePC(), gem5::SparcISA::SparcStaticInst::advancePC(), gem5::ArmISA::MicroOpX::advancePC(), gem5::X86ISA::X86MicroopBase::advancePC(), gem5::RiscvISA::RiscvMicroInst::advancePC(), gem5::ArmISA::ArmStaticInst::advancePC(), gem5::X86ISA::X86StaticInst::advancePC(), gem5::ArmISA::PredMicroop::advancePC(), gem5::ArmISA::FpOp::advancePC(), gem5::ArmISA::SoftwareStep::advanceSS(), gem5::PowerProcess::argsInit(), gem5::ArmISA::BranchImm64::branchTarget(), gem5::X86ISA::X86MicroopBase::branchTarget(), gem5::ArmISA::BranchImmReg64::branchTarget(), gem5::ArmISA::BranchImmImmReg64::branchTarget(), gem5::RiscvISA::RiscvStaticInst::buildRetPC(), gem5::PowerISA::PowerStaticInst::buildRetPC(), gem5::SparcISA::SparcStaticInst::buildRetPC(), gem5::X86ISA::X86StaticInst::buildRetPC(), gem5::ArmISA::ArmStaticInst::buildRetPC(), gem5::Trace::SparcNativeTrace::check(), gem5::Trace::ArmNativeTrace::check(), gem5::RiscvISA::Decoder::decode(), gem5::ArmISA::Decoder::decode(), gem5::X86ISA::Decoder::decode(), gem5::SparcISA::doNormalFault(), gem5::SparcISA::doREDFault(), gem5::GenericISA::PCStateWithNext::equals(), gem5::GenericISA::DelaySlotPCState< 4 >::equals(), gem5::DebugStep::execute(), gem5::SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), gem5::SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), gem5::SparcISA::SEWorkload::handleTrap(), gem5::PowerProcess::initState(), gem5::X86ISA::X86FaultBase::invoke(), gem5::RiscvISA::RiscvFault::invoke(), gem5::SparcISA::TrapInstruction::invoke(), gem5::ArmISA::SupervisorCall::invoke(), gem5::ArmISA::ArmFault::invoke32(), gem5::ArmISA::ArmFault::invoke64(), gem5::ArmISA::Decoder::moreBytes(), gem5::ArmISA::ISA::readMiscReg(), gem5::ArmISA::ArmStaticInst::readPC(), gem5::ArmISA::SkipFunc::returnFromFuncIn(), gem5::ArmISA::HTMCheckpoint::save(), gem5::ArmISA::ArmStaticInst::setAIWNextPC(), gem5::MipsISA::MipsFaultBase::setExceptionState(), gem5::ArmISA::ArmStaticInst::setIWNextPC(), gem5::RiscvISA::ISA::setMiscReg(), gem5::ArmISA::ISA::setMiscReg(), gem5::ArmISA::ArmStaticInst::setNextPC(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::setRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), gem5::X86ISA::EmuLinux::syscall(), gem5::ArmISA::SelfDebug::testBreakPoints(), gem5::PowerISA::PCState::update(), gem5::X86ISA::PCState::update(), gem5::RiscvISA::PCState::update(), gem5::Trace::X86NativeTrace::ThreadState::update(), gem5::Trace::ArmNativeTrace::ThreadState::update(), gem5::GenericISA::PCStateWithNext::update(), gem5::GenericISA::DelaySlotPCState< 4 >::update(), and gem5::ArmKvmCPU::updateTCStateCore().

◆ as() [2/2]

template<class Target >
const Target& gem5::PCStateBase::as ( ) const
inline

Definition at line 79 of file pcstate.hh.

◆ branching()

virtual bool gem5::PCStateBase::branching ( ) const
pure virtual

◆ clone()

virtual PCStateBase* gem5::PCStateBase::clone ( ) const
pure virtual

◆ equals()

virtual bool gem5::PCStateBase::equals ( const PCStateBase other) const
inlinevirtual

◆ instAddr()

Addr gem5::PCStateBase::instAddr ( ) const
inline

Returns the memory address of the instruction this PC points to.

Returns
Memory address of the instruction this PC points to.

Definition at line 107 of file pcstate.hh.

References _pc.

Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), gem5::AtomicSimpleCPU::amoMem(), gem5::PowerISA::BranchOp::branchTarget(), gem5::PowerISA::BranchDispCondOp::branchTarget(), gem5::o3::Fetch::buildInst(), gem5::PowerISA::Decoder::decode(), gem5::MipsISA::Decoder::decode(), gem5::SparcISA::Decoder::decode(), gem5::o3::Fetch::doSquash(), gem5::X86ISA::EmuLinux::event(), gem5::DecoderFaultInst::execute(), gem5::o3::Fetch::fetch(), gem5::CheckerCPU::genMemFragmentRequest(), gem5::MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), gem5::PowerISA::RemoteGDB::Power64GdbRegCache::getRegs(), gem5::ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), gem5::X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), gem5::TimingSimpleCPU::htmSendAbortSignal(), gem5::TimingSimpleCPU::initiateHtmCmd(), gem5::TimingSimpleCPU::initiateMemAMO(), gem5::TimingSimpleCPU::initiateMemRead(), gem5::PowerISA::UnimplementedOpcodeFault::invoke(), gem5::PowerISA::TrapFault::invoke(), gem5::RiscvISA::RiscvFault::invoke(), gem5::X86ISA::PageFault::invoke(), gem5::ArmISA::ArmFault::invoke64(), gem5::mmapFunc(), gem5::o3::Fetch::pipelineIcacheAccesses(), gem5::SimPoint::profile(), gem5::Trace::TarmacParserRecord::readMemNoEffect(), gem5::branch_prediction::SimpleIndirectPredictor::recordTarget(), gem5::BaseSimpleCPU::setupFetchRequest(), gem5::branch_prediction::BPredUnit::squash(), gem5::X86ISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), gem5::minor::Execute::tryPCEvents(), gem5::ArmV8KvmCPU::updateKvmState(), gem5::ArmKvmCPU::updateKvmStateCore(), gem5::X86KvmCPU::updateKvmStateRegs(), and gem5::TimingSimpleCPU::writeMem().

◆ microPC()

MicroPC gem5::PCStateBase::microPC ( ) const
inline

◆ operator=()

PCStateBase& gem5::PCStateBase::operator= ( const PCStateBase other)
protecteddefault

◆ output()

virtual void gem5::PCStateBase::output ( std::ostream &  os) const
pure virtual

◆ serialize()

void gem5::PCStateBase::serialize ( CheckpointOut cp) const
inlineoverridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Reimplemented in gem5::GenericISA::DelaySlotPCState< InstWidth >, gem5::GenericISA::DelaySlotPCState< 4 >, gem5::GenericISA::PCStateWithNext, and gem5::X86ISA::PCState.

Definition at line 133 of file pcstate.hh.

References _pc, _upc, and SERIALIZE_SCALAR.

Referenced by gem5::serialize(), and gem5::GenericISA::PCStateWithNext::serialize().

◆ unserialize()

void gem5::PCStateBase::unserialize ( CheckpointIn cp)
inlineoverridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Reimplemented in gem5::GenericISA::DelaySlotPCState< InstWidth >, gem5::GenericISA::DelaySlotPCState< 4 >, gem5::GenericISA::PCStateWithNext, and gem5::X86ISA::PCState.

Definition at line 140 of file pcstate.hh.

References _pc, _upc, and UNSERIALIZE_SCALAR.

Referenced by gem5::GenericISA::PCStateWithNext::unserialize().

◆ update() [1/2]

virtual void gem5::PCStateBase::update ( const PCStateBase other)
inlinevirtual

◆ update() [2/2]

void gem5::PCStateBase::update ( const PCStateBase ptr)
inline

Definition at line 91 of file pcstate.hh.

References update().

Referenced by update().

◆ uReset()

virtual void gem5::PCStateBase::uReset ( )
inlinevirtual

Reimplemented in gem5::GenericISA::PCStateWithNext.

Definition at line 124 of file pcstate.hh.

References _upc.

Referenced by gem5::GenericISA::PCStateWithNext::uReset().

Member Data Documentation

◆ _pc

Addr gem5::PCStateBase::_pc = 0
protected

◆ _upc

MicroPC gem5::PCStateBase::_upc = 0
protected

The documentation for this class was generated from the following file:

Generated on Wed May 4 2022 12:14:42 for gem5 by doxygen 1.8.17