gem5 v24.0.0.0
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gem5::RiscvISA::RiscvMacroInst Member List

This is the complete list of members for gem5::RiscvISA::RiscvMacroInst, including all inherited members.

_destRegIdxPtrgem5::StaticInstprivate
_numDestRegsgem5::StaticInstprotected
_numSrcRegsgem5::StaticInstprotected
_numTypedDestRegsgem5::StaticInstprotected
_opClassgem5::StaticInstprotected
_sizegem5::StaticInstprotected
_srcRegIdxPtrgem5::StaticInstprivate
advancePC(PCStateBase &pc) const overridegem5::RiscvISA::RiscvStaticInstinlinevirtual
advancePC(ThreadContext *tc) const overridegem5::RiscvISA::RiscvStaticInstinlinevirtual
asBytes(void *buf, size_t size) overridegem5::RiscvISA::RiscvStaticInstinlinevirtual
branchTarget(const PCStateBase &pc) constgem5::StaticInstvirtual
branchTarget(ThreadContext *tc) constgem5::StaticInstvirtual
buildRetPC(const PCStateBase &cur_pc, const PCStateBase &call_pc) const overridegem5::RiscvISA::RiscvStaticInstinlinevirtual
cachedDisassemblygem5::StaticInstmutableprotected
completeAcc(PacketPtr pkt, ExecContext *xc, trace::InstRecord *traceData) const overridegem5::RiscvISA::RiscvMacroInstinlineprotected
gem5::RiscvISA::RiscvStaticInst::completeAcc(Packet *pkt, ExecContext *xc, trace::InstRecord *trace_data) constgem5::StaticInstinlinevirtual
countgem5::RefCountedmutableprivate
decref() constgem5::RefCountedinline
destRegIdx(int i) constgem5::StaticInstinline
disassemble(Addr pc, const loader::SymbolTable *symtab=nullptr) constgem5::StaticInstvirtual
execute(ExecContext *xc, trace::InstRecord *traceData) const overridegem5::RiscvISA::RiscvMacroInstinlineprotectedvirtual
fetchMicroop(MicroPC upc) const overridegem5::RiscvISA::RiscvMacroInstinlineprotectedvirtual
flagsgem5::StaticInstprotected
generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const =0gem5::StaticInstprotectedpure virtual
getEMI() constgem5::StaticInstinlinevirtual
getName()gem5::StaticInstinline
incref() constgem5::RefCountedinline
initiateAcc(ExecContext *xc, trace::InstRecord *traceData) const overridegem5::RiscvISA::RiscvMacroInstinlineprotectedvirtual
isAtomic() constgem5::StaticInstinline
isCall() constgem5::StaticInstinline
isCondCtrl() constgem5::StaticInstinline
isControl() constgem5::StaticInstinline
isDataPrefetch() constgem5::StaticInstinline
isDelayedCommit() constgem5::StaticInstinline
isDirectCtrl() constgem5::StaticInstinline
isFirstMicroop() constgem5::StaticInstinline
isFloating() constgem5::StaticInstinline
isFullMemBarrier() constgem5::StaticInstinline
isHtmCancel() constgem5::StaticInstinline
isHtmCmd() constgem5::StaticInstinline
isHtmStart() constgem5::StaticInstinline
isHtmStop() constgem5::StaticInstinline
isIndirectCtrl() constgem5::StaticInstinline
isInstPrefetch() constgem5::StaticInstinline
isInteger() constgem5::StaticInstinline
isInvalid() constgem5::StaticInstinline
isLastMicroop() constgem5::StaticInstinline
isLoad() constgem5::StaticInstinline
isMacroop() constgem5::StaticInstinline
isMatrix() constgem5::StaticInstinline
isMemRef() constgem5::StaticInstinline
isMicroop() constgem5::StaticInstinline
isNonSpeculative() constgem5::StaticInstinline
isNop() constgem5::StaticInstinline
isPrefetch() constgem5::StaticInstinline
isPseudo() constgem5::StaticInstinline
isQuiesce() constgem5::StaticInstinline
isReadBarrier() constgem5::StaticInstinline
isReturn() constgem5::StaticInstinline
isSerializeAfter() constgem5::StaticInstinline
isSerializeBefore() constgem5::StaticInstinline
isSerializing() constgem5::StaticInstinline
isSquashAfter() constgem5::StaticInstinline
isStore() constgem5::StaticInstinline
isStoreConditional() constgem5::StaticInstinline
isSyscall() constgem5::StaticInstinline
isUncondCtrl() constgem5::StaticInstinline
isUnverifiable() constgem5::StaticInstinline
isVector() constgem5::StaticInstinline
isWriteBarrier() constgem5::StaticInstinline
machInstgem5::RiscvISA::RiscvStaticInst
microopsgem5::RiscvISA::RiscvMacroInstprotected
mnemonicgem5::StaticInstprotected
nullStaticInstPtrgem5::StaticInststatic
numDestRegs() constgem5::StaticInstinline
numDestRegs(RegClassType type) constgem5::StaticInstinline
numSrcRegs() constgem5::StaticInstinline
opClass() constgem5::StaticInstinline
operator=(const RefCounted &)gem5::RefCountedprivate
printFlags(std::ostream &outs, const std::string &separator) constgem5::StaticInst
RefCounted(const RefCounted &)gem5::RefCountedprivate
RefCounted()gem5::RefCountedinline
RegIdArrayPtr typedefgem5::StaticInst
RiscvMacroInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)gem5::RiscvISA::RiscvMacroInstinlineprotected
RiscvStaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)gem5::RiscvISA::RiscvStaticInstinlineprotected
rvExt(T64 x) constgem5::RiscvISA::RiscvStaticInstinlineprotected
rvSelect(T v32, T v64) constgem5::RiscvISA::RiscvStaticInstinlineprotected
rvSext(int64_t x) constgem5::RiscvISA::RiscvStaticInstinlineprotected
rvZext(uint64_t x) constgem5::RiscvISA::RiscvStaticInstinlineprotected
setDelayedCommit()gem5::StaticInstinline
setDestRegIdx(int i, const RegId &val)gem5::StaticInstinline
setFirstMicroop()gem5::StaticInstinline
setFlag(Flags f)gem5::StaticInstinline
setLastMicroop()gem5::StaticInstinline
setRegIdxArrays(RegIdArrayPtr src, RegIdArrayPtr dest)gem5::StaticInstinlineprotected
setSrcRegIdx(int i, const RegId &val)gem5::StaticInstinline
simpleAsBytes(void *buf, size_t max_size, const T &t)gem5::StaticInstinlineprotected
size(size_t newSize) overridegem5::RiscvISA::RiscvMacroInstinlineprotectedvirtual
gem5::RiscvISA::RiscvStaticInst::size() constgem5::StaticInstinline
srcRegIdx(int i) constgem5::StaticInstinline
StaticInst(const char *_mnemonic, OpClass op_class)gem5::StaticInstinlineprotected
~RefCounted()gem5::RefCountedinlinevirtual
~RiscvMacroInst()gem5::RiscvISA::RiscvMacroInstinlineprotected
~StaticInst()gem5::StaticInstinlinevirtual
Generated on Tue Jun 18 2024 16:24:21 for gem5 by doxygen 1.11.0