kernel_code.hh File Reference

#include <bitset>
#include <cstdint>

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Classes
struct	gem5::GEM5_PACKED
	PM4 packets. More...

Namespaces
namespace	gem5
	Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.

Typedefs
typedef struct gem5::GEM5_PACKED	gem5::AMDKernelCode

Enumerations
enum	gem5::ScalarRegInitFields : int {   gem5::PrivateSegBuf = 0 , gem5::DispatchPtr = 1 , gem5::QueuePtr = 2 , gem5::KernargSegPtr = 3 ,   gem5::DispatchId = 4 , gem5::FlatScratchInit = 5 , gem5::PrivateSegSize = 6 , gem5::WorkgroupIdX = 7 ,   gem5::WorkgroupIdY = 8 , gem5::WorkgroupIdZ = 9 , gem5::WorkgroupInfo = 10 , gem5::PrivSegWaveByteOffset = 11 ,   gem5::NumScalarInitFields = 12 }
	these enums represent the indices into the initialRegState bitfields in HsaKernelInfo. More...
enum	gem5::VectorRegInitFields : int { gem5::WorkitemIdX = 0 , gem5::WorkitemIdY = 1 , gem5::WorkitemIdZ = 2 , gem5::NumVectorInitFields = 3 }