gem5 v24.0.0.0
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gpu-compute Directory Reference

Files

 comm.cc
 
 comm.hh
 
 compute_unit.cc
 
 compute_unit.hh
 
 dispatcher.cc
 
 dispatcher.hh
 The GPUDispatcher is the component of the shader that is responsible for creating and dispatching WGs to the compute units.
 
 dyn_pool_manager.cc
 
 dyn_pool_manager.hh
 
 exec_stage.cc
 
 exec_stage.hh
 
 fetch_stage.cc
 
 fetch_stage.hh
 
 fetch_unit.cc
 
 fetch_unit.hh
 
 global_memory_pipeline.cc
 
 global_memory_pipeline.hh
 
 gpu_command_processor.cc
 
 gpu_command_processor.hh
 The GPUCommandProcessor (CP) is responsible for accepting commands, in the form of HSA AQL packets, from the HSA packet processor (HSAPP).
 
 gpu_compute_driver.cc
 
 gpu_compute_driver.hh
 The GPUComputeDriver implements an HSADriver for an HSA AMD GPU agent.
 
 gpu_dyn_inst.cc
 
 gpu_dyn_inst.hh
 
 gpu_exec_context.cc
 
 gpu_exec_context.hh
 
 gpu_render_driver.cc
 
 gpu_render_driver.hh
 
 gpu_static_inst.cc
 
 gpu_static_inst.hh
 
 hsa_queue_entry.hh
 HSAQueuEntry is the simulator's internal representation of an AQL queue entry (task).
 
 kernel_code.hh
 
 lds_state.cc
 
 lds_state.hh
 
 local_memory_pipeline.cc
 
 local_memory_pipeline.hh
 
 misc.hh
 
 of_scheduling_policy.hh
 
 operand_info.hh
 
 pool_manager.cc
 
 pool_manager.hh
 
 register_file.cc
 
 register_file.hh
 
 register_file_cache.cc
 
 register_file_cache.hh
 
 register_manager.cc
 
 register_manager.hh
 
 register_manager_policy.hh
 
 rr_scheduling_policy.hh
 
 scalar_memory_pipeline.cc
 
 scalar_memory_pipeline.hh
 
 scalar_register_file.cc
 
 scalar_register_file.hh
 
 schedule_stage.cc
 
 schedule_stage.hh
 
 scheduler.cc
 
 scheduler.hh
 
 scheduling_policy.hh
 
 scoreboard_check_stage.cc
 
 scoreboard_check_stage.hh
 
 shader.cc
 
 shader.hh
 
 simple_pool_manager.cc
 
 simple_pool_manager.hh
 
 static_register_manager_policy.cc
 
 static_register_manager_policy.hh
 
 vector_register_file.cc
 
 vector_register_file.hh
 
 wavefront.cc
 
 wavefront.hh
 

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