gem5  v22.1.0.0
kernel_code.hh
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31 
32 #ifndef __GPU_COMPUTE_KERNEL_CODE_HH__
33 #define __GPU_COMPUTE_KERNEL_CODE_HH__
34 
35 #include <bitset>
36 #include <cstdint>
37 
38 namespace gem5
39 {
40 
55 {
58  QueuePtr = 2,
72 };
73 
75 {
80 };
81 
83 {
86  uint16_t amd_machine_kind;
94 
105  // the 32b below here represent the fields of
106  // the COMPUTE_PGM_RSRC1 register
109  uint32_t priority : 2;
110  uint32_t float_mode_round_32 : 2;
112  uint32_t float_mode_denorm_32 : 2;
114  uint32_t priv : 1;
115  uint32_t enable_dx10_clamp : 1;
116  uint32_t debug_mode : 1;
117  uint32_t enable_ieee_mode : 1;
118  uint32_t bulky : 1;
119  uint32_t cdbg_user : 1;
121  // end COMPUTE_PGM_RSRC1 register
122 
123  // the 32b below here represent the fields of
124  // the COMPUTE_PGM_RSRC2 register
126  uint32_t user_sgpr_count : 5;
127  uint32_t enable_trap_handler : 1;
135  uint32_t granulated_lds_size : 9;
144  // end COMPUTE_PGM_RSRC2
145 
146  // the 32b below here represent the fields of
147  // KERNEL_CODE_PROPERTIES
150  uint32_t enable_sgpr_queue_ptr : 1;
160  uint32_t private_element_size : 2;
161  uint32_t is_ptr64 : 1;
162  uint32_t is_dynamic_callstack : 1;
163  uint32_t is_debug_enabled : 1;
164  uint32_t is_xnack_enabled : 1;
166  // end KERNEL_CODE_PROPERTIES
167 
184  uint8_t wavefront_size;
186  uint8_t reserved[12];
188  uint64_t control_directives[16];
189 };
190 
191 } // namespace gem5
192 
193 #endif // __GPU_COMPUTE_KERNEL_CODE_HH__
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
ScalarRegInitFields
these enums represent the indices into the initialRegState bitfields in HsaKernelInfo.
Definition: kernel_code.hh:55
@ GridWorkgroupCountZ
Definition: kernel_code.hh:65
@ WorkgroupIdX
Definition: kernel_code.hh:66
@ DispatchId
Definition: kernel_code.hh:60
@ NumScalarInitFields
Definition: kernel_code.hh:71
@ DispatchPtr
Definition: kernel_code.hh:57
@ QueuePtr
Definition: kernel_code.hh:58
@ PrivSegWaveByteOffset
Definition: kernel_code.hh:70
@ PrivateSegBuf
Definition: kernel_code.hh:56
@ WorkgroupIdY
Definition: kernel_code.hh:67
@ PrivateSegSize
Definition: kernel_code.hh:62
@ WorkgroupInfo
Definition: kernel_code.hh:69
@ GridWorkgroupCountY
Definition: kernel_code.hh:64
@ WorkgroupIdZ
Definition: kernel_code.hh:68
@ GridWorkgroupCountX
Definition: kernel_code.hh:63
@ FlatScratchInit
Definition: kernel_code.hh:61
@ KernargSegPtr
Definition: kernel_code.hh:59
VectorRegInitFields
Definition: kernel_code.hh:75
@ WorkitemIdX
Definition: kernel_code.hh:76
@ WorkitemIdZ
Definition: kernel_code.hh:78
@ NumVectorInitFields
Definition: kernel_code.hh:79
@ WorkitemIdY
Definition: kernel_code.hh:77
uint32_t enable_exception_memory_violation
Definition: kernel_code.hh:134
uint32_t amd_kernel_code_version_minor
Definition: kernel_code.hh:85
uint32_t enable_ordered_append_gds
Definition: kernel_code.hh:159
uint32_t float_mode_denorm_16_64
Definition: kernel_code.hh:113
uint32_t kernel_code_properties_reserved1
Definition: kernel_code.hh:158
uint8_t group_segment_alignment
Definition: kernel_code.hh:182
uint32_t enable_sgpr_workgroup_info
Definition: kernel_code.hh:131
uint32_t enable_sgpr_queue_ptr
Definition: kernel_code.hh:150
uint32_t enable_sgpr_grid_workgroup_count_x
Definition: kernel_code.hh:155
uint32_t enable_exception_ieee_754_fp_overflow
Definition: kernel_code.hh:139
uint32_t enable_exception_ieee_754_fp_underflow
Definition: kernel_code.hh:140
uint32_t gds_segment_byte_size
Definition: kernel_code.hh:170
uint32_t enable_trap_handler
Definition: kernel_code.hh:127
uint16_t wavefront_sgpr_count
Definition: kernel_code.hh:173
int64_t kernel_code_entry_byte_offset
Definition: kernel_code.hh:90
uint16_t debug_private_segment_buffer_sgpr
Definition: kernel_code.hh:180
uint16_t reserved_vgpr_count
Definition: kernel_code.hh:176
uint32_t granulated_wavefront_sgpr_count
Definition: kernel_code.hh:108
uint16_t reserved_sgpr_first
Definition: kernel_code.hh:177
uint32_t enable_sgpr_dispatch_ptr
Definition: kernel_code.hh:149
uint16_t debug_wavefront_private_segment_offset_sgpr
Definition: kernel_code.hh:179
uint64_t max_scratch_backing_memory_byte_size
Definition: kernel_code.hh:93
uint32_t enable_sgpr_dispatch_id
Definition: kernel_code.hh:152
uint32_t workitem_private_segment_byte_size
Definition: kernel_code.hh:168
uint32_t enable_vgpr_workitem_id
Definition: kernel_code.hh:132
uint8_t private_segment_alignment
Definition: kernel_code.hh:183
uint16_t amd_machine_version_major
Definition: kernel_code.hh:87
uint8_t kernarg_segment_alignment
Definition: kernel_code.hh:181
uint16_t amd_machine_kind
Definition: kernel_code.hh:86
uint32_t workgroup_fbarrier_count
Definition: kernel_code.hh:172
uint32_t enable_exception_ieee_754_fp_invalid_operation
Definition: kernel_code.hh:136
uint32_t is_dynamic_callstack
Definition: kernel_code.hh:162
uint32_t enable_ieee_mode
Definition: kernel_code.hh:117
uint32_t workgroup_group_segment_byte_size
Definition: kernel_code.hh:169
uint32_t float_mode_round_32
Definition: kernel_code.hh:110
uint32_t enable_exception_fp_denormal_source
Definition: kernel_code.hh:137
uint32_t private_element_size
Definition: kernel_code.hh:160
uint32_t amd_kernel_code_version_major
Definition: kernel_code.hh:84
uint32_t granulated_workitem_vgpr_count
The fields below are used to set program settings for compute shaders.
Definition: kernel_code.hh:107
uint8_t reserved[12]
Definition: kernel_code.hh:186
uint32_t enable_sgpr_private_segment_wave_byte_offset
Definition: kernel_code.hh:125
uint32_t enable_sgpr_workgroup_id_y
Definition: kernel_code.hh:129
uint32_t enable_exception_address_watch
Definition: kernel_code.hh:133
uint32_t compute_pgm_rsrc1_reserved
Definition: kernel_code.hh:120
uint32_t enable_sgpr_grid_workgroup_count_y
Definition: kernel_code.hh:156
uint32_t enable_sgpr_workgroup_id_x
Definition: kernel_code.hh:128
uint32_t compute_pgm_rsrc2_reserved
Definition: kernel_code.hh:143
uint16_t workitem_vgpr_count
Definition: kernel_code.hh:174
uint32_t enable_exception_ieee_754_fp_inexact
Definition: kernel_code.hh:141
uint32_t is_debug_enabled
Definition: kernel_code.hh:163
uint32_t user_sgpr_count
Definition: kernel_code.hh:126
uint32_t enable_sgpr_workgroup_id_z
Definition: kernel_code.hh:130
uint32_t granulated_lds_size
Definition: kernel_code.hh:135
uint32_t enable_sgpr_private_segment_size
Definition: kernel_code.hh:154
uint32_t enable_sgpr_private_segment_buffer
Definition: kernel_code.hh:148
uint32_t is_xnack_enabled
Definition: kernel_code.hh:164
uint16_t amd_machine_version_minor
Definition: kernel_code.hh:88
uint64_t kernarg_segment_byte_size
Definition: kernel_code.hh:171
uint32_t float_mode_denorm_32
Definition: kernel_code.hh:112
uint64_t control_directives[16]
Definition: kernel_code.hh:188
uint32_t kernel_code_properties_reserved2
Definition: kernel_code.hh:165
uint64_t kernel_code_prefetch_byte_size
Definition: kernel_code.hh:92
uint16_t reserved_sgpr_count
Definition: kernel_code.hh:178
uint32_t enable_exception_ieee_754_fp_division_by_zero
Definition: kernel_code.hh:138
uint16_t amd_machine_version_stepping
Definition: kernel_code.hh:89
uint64_t runtime_loader_kernel_symbol
Definition: kernel_code.hh:187
uint32_t enable_exception_int_divide_by_zero
Definition: kernel_code.hh:142
uint32_t enable_sgpr_flat_scratch_init
Definition: kernel_code.hh:153
uint32_t enable_dx10_clamp
Definition: kernel_code.hh:115
uint32_t float_mode_round_16_64
Definition: kernel_code.hh:111
int64_t kernel_code_prefetch_byte_offset
Definition: kernel_code.hh:91
uint16_t reserved_vgpr_first
Definition: kernel_code.hh:175
uint32_t enable_sgpr_grid_workgroup_count_z
Definition: kernel_code.hh:157
uint32_t enable_sgpr_kernarg_segment_ptr
Definition: kernel_code.hh:151

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