gem5  v22.0.0.2
pagetable.cc
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1 /*
2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
3  * Copyright (c) 2007 MIPS Technologies, Inc.
4  * Copyright (c) 2007-2008 The Florida State University
5  * Copyright (c) 2009 The University of Edinburgh
6  * All rights reserved.
7  *
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9  * modification, are permitted provided that the following conditions are
10  * met: redistributions of source code must retain the above copyright
11  * notice, this list of conditions and the following disclaimer;
12  * redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution;
15  * neither the name of the copyright holders nor the names of its
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17  * this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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30  */
31 
32 #include "arch/power/pagetable.hh"
33 
34 #include "sim/serialize.hh"
35 
36 namespace gem5
37 {
38 
39 namespace PowerISA
40 {
41 
42 void
44 {
59 }
60 
61 void
63 {
78 }
79 
80 } // namespace PowerISA
81 } // namespace gem5
gem5::PowerISA::PTE::V0
bool V0
Definition: pagetable.hh:64
gem5::PowerISA::PTE::VPN
Addr VPN
Definition: pagetable.hh:53
gem5::PowerISA::PTE::asid
uint8_t asid
Definition: pagetable.hh:56
serialize.hh
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:575
gem5::PowerISA::PTE::C0
uint8_t C0
Definition: pagetable.hh:65
gem5::PowerISA::PTE::AddrShiftAmount
int AddrShiftAmount
Definition: pagetable.hh:76
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::PowerISA::PTE::PFN0
Addr PFN0
Definition: pagetable.hh:62
gem5::PowerISA::PTE::OffsetMask
int OffsetMask
Definition: pagetable.hh:77
gem5::PowerISA::PTE::serialize
void serialize(CheckpointOut &cp) const
Definition: pagetable.cc:43
pagetable.hh
gem5::PowerISA::PTE::unserialize
void unserialize(CheckpointIn &cp)
Definition: pagetable.cc:62
gem5::PowerISA::PTE::G
bool G
Definition: pagetable.hh:59
gem5::PowerISA::PTE::D0
bool D0
Definition: pagetable.hh:63
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:568
gem5::PowerISA::PTE::D1
bool D1
Definition: pagetable.hh:69
gem5::PowerISA::PTE::Mask
Addr Mask
Definition: pagetable.hh:49
gem5::PowerISA::PTE::V1
bool V1
Definition: pagetable.hh:70
gem5::PowerISA::PTE::PFN1
Addr PFN1
Definition: pagetable.hh:68
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::PowerISA::PTE::C1
uint8_t C1
Definition: pagetable.hh:71

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