#include <smmu_v3_caches.hh>

Public Attributes
bool	valid

uint32_t	lastUsed

uint32_t	sid

uint32_t	ssid

bool	stage1_en

bool	stage2_en

Addr	ttb0

Addr	ttb1

Addr	httb

uint16_t	asid

uint16_t	vmid

uint8_t	stage1_tg

uint8_t	stage2_tg

uint8_t	t0sz

uint8_t	s2t0sz

Detailed Description

Definition at line 248 of file smmu_v3_caches.hh.

Member Data Documentation

◆ asid

uint16_t gem5::ConfigCache::Entry::asid

Definition at line 263 of file smmu_v3_caches.hh.

◆ httb

Addr gem5::ConfigCache::Entry::httb

Definition at line 262 of file smmu_v3_caches.hh.

◆ lastUsed

uint32_t gem5::ConfigCache::Entry::lastUsed

mutable

Definition at line 251 of file smmu_v3_caches.hh.

Referenced by gem5::ConfigCache::lookup(), and gem5::ConfigCache::store().

◆ s2t0sz

uint8_t gem5::ConfigCache::Entry::s2t0sz

Definition at line 268 of file smmu_v3_caches.hh.

◆ sid

uint32_t gem5::ConfigCache::Entry::sid

Definition at line 254 of file smmu_v3_caches.hh.

Referenced by gem5::ConfigCache::store().

◆ ssid

uint32_t gem5::ConfigCache::Entry::ssid

Definition at line 255 of file smmu_v3_caches.hh.

Referenced by gem5::ConfigCache::store().

◆ stage1_en

bool gem5::ConfigCache::Entry::stage1_en

Definition at line 258 of file smmu_v3_caches.hh.

◆ stage1_tg

uint8_t gem5::ConfigCache::Entry::stage1_tg

Definition at line 265 of file smmu_v3_caches.hh.

◆ stage2_en

bool gem5::ConfigCache::Entry::stage2_en

Definition at line 259 of file smmu_v3_caches.hh.

◆ stage2_tg

uint8_t gem5::ConfigCache::Entry::stage2_tg

Definition at line 266 of file smmu_v3_caches.hh.

◆ t0sz

uint8_t gem5::ConfigCache::Entry::t0sz

Definition at line 267 of file smmu_v3_caches.hh.

◆ ttb0

Addr gem5::ConfigCache::Entry::ttb0

Definition at line 260 of file smmu_v3_caches.hh.

◆ ttb1

Addr gem5::ConfigCache::Entry::ttb1

Definition at line 261 of file smmu_v3_caches.hh.

◆ valid

bool gem5::ConfigCache::Entry::valid

Definition at line 250 of file smmu_v3_caches.hh.

Referenced by gem5::ConfigCache::ConfigCache(), gem5::SMMUTranslationProcess::configCacheUpdate(), gem5::ConfigCache::invalidateSID(), gem5::ConfigCache::invalidateSSID(), and gem5::ConfigCache::store().

◆ vmid

uint16_t gem5::ConfigCache::Entry::vmid

Definition at line 264 of file smmu_v3_caches.hh.

The documentation for this struct was generated from the following file:

dev/arm/smmu_v3_caches.hh

Public Attributes