gem5  v22.1.0.0
t1000.cc
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28 
33 #include "dev/sparc/t1000.hh"
34 
35 #include "base/logging.hh"
36 
37 namespace gem5
38 {
39 
41 
42 void
44 {
45  warn_once("Don't know what interrupt to post for console.\n");
46  //panic("Need implementation\n");
47 }
48 
49 void
51 {
52  warn_once("Don't know what interrupt to clear for console.\n");
53  //panic("Need implementation\n");
54 }
55 
56 void
58 {
59  panic("Need implementation\n");
60 }
61 
62 void
64 {
65  panic("Need implementation\n");
66 }
67 
68 } // namespace gem5
T1000Params Params
Definition: t1000.hh:47
virtual void clearConsoleInt()
Clear a posted CPU interrupt.
Definition: t1000.cc:50
T1000(const Params &p)
Constructor for the Tsunami Class.
Definition: t1000.cc:40
virtual void postConsoleInt()
Cause the cpu to post a serial interrupt to the CPU.
Definition: t1000.cc:43
virtual void clearPciInt(int line)
Clear a posted PCI->CPU interrupt.
Definition: t1000.cc:63
virtual void postPciInt(int line)
Cause the chipset to post a cpi interrupt to the CPU.
Definition: t1000.cc:57
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
#define warn_once(...)
Definition: logging.hh:250
Bitfield< 54 > p
Definition: pagetable.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Declaration of top level class for the T1000 platform chips.

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