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nativetrace.cc
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28 
29 #include "arch/x86/nativetrace.hh"
30 
31 #include "arch/x86/isa_traits.hh"
32 #include "arch/x86/regs/float.hh"
33 #include "arch/x86/regs/int.hh"
34 #include "cpu/thread_context.hh"
35 #include "debug/ExecRegDelta.hh"
36 #include "params/X86NativeTrace.hh"
37 #include "sim/byteswap.hh"
38 
39 namespace Trace {
40 
41 void
42 X86NativeTrace::ThreadState::update(NativeTrace *parent)
43 {
44  parent->read(this, sizeof(*this));
45  rax = letoh(rax);
46  rcx = letoh(rcx);
47  rdx = letoh(rdx);
48  rbx = letoh(rbx);
49  rsp = letoh(rsp);
50  rbp = letoh(rbp);
51  rsi = letoh(rsi);
52  rdi = letoh(rdi);
53  r8 = letoh(r8);
54  r9 = letoh(r9);
55  r10 = letoh(r10);
56  r11 = letoh(r11);
57  r12 = letoh(r12);
58  r13 = letoh(r13);
59  r14 = letoh(r14);
60  r15 = letoh(r15);
61  rip = letoh(rip);
62  //This should be expanded if x87 registers are considered
63  for (int i = 0; i < 8; i++)
64  mmx[i] = letoh(mmx[i]);
65  for (int i = 0; i < 32; i++)
66  xmm[i] = letoh(xmm[i]);
67 }
68 
69 void
70 X86NativeTrace::ThreadState::update(ThreadContext *tc)
71 {
72  rax = tc->readIntReg(X86ISA::INTREG_RAX);
73  rcx = tc->readIntReg(X86ISA::INTREG_RCX);
74  rdx = tc->readIntReg(X86ISA::INTREG_RDX);
75  rbx = tc->readIntReg(X86ISA::INTREG_RBX);
76  rsp = tc->readIntReg(X86ISA::INTREG_RSP);
77  rbp = tc->readIntReg(X86ISA::INTREG_RBP);
78  rsi = tc->readIntReg(X86ISA::INTREG_RSI);
79  rdi = tc->readIntReg(X86ISA::INTREG_RDI);
80  r8 = tc->readIntReg(X86ISA::INTREG_R8);
81  r9 = tc->readIntReg(X86ISA::INTREG_R9);
82  r10 = tc->readIntReg(X86ISA::INTREG_R10);
83  r11 = tc->readIntReg(X86ISA::INTREG_R11);
84  r12 = tc->readIntReg(X86ISA::INTREG_R12);
85  r13 = tc->readIntReg(X86ISA::INTREG_R13);
86  r14 = tc->readIntReg(X86ISA::INTREG_R14);
87  r15 = tc->readIntReg(X86ISA::INTREG_R15);
88  rip = tc->pcState().npc();
89  //This should be expanded if x87 registers are considered
90  for (int i = 0; i < 8; i++)
91  mmx[i] = tc->readFloatReg(X86ISA::FLOATREG_MMX(i));
92  for (int i = 0; i < 32; i++)
93  xmm[i] = tc->readFloatReg(X86ISA::FLOATREG_XMM_BASE + i);
94 }
95 
96 
97 X86NativeTrace::X86NativeTrace(const Params *p)
98  : NativeTrace(p)
99 {
100  checkRcx = true;
101  checkR11 = true;
102 }
103 
104 bool
105 X86NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
106 {
107  if (!checkRcx)
108  checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
109  if (checkRcx)
110  return checkReg(name, mVal, nVal);
111  return true;
112 }
113 
114 bool
115 X86NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
116 {
117  if (!checkR11)
118  checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
119  if (checkR11)
120  return checkReg(name, mVal, nVal);
121  return true;
122 }
123 
124 bool
125 X86NativeTrace::checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[])
126 {
127  if (mXmmBuf[num * 2] != nXmmBuf[num * 2] ||
128  mXmmBuf[num * 2 + 1] != nXmmBuf[num * 2 + 1]) {
129  DPRINTF(ExecRegDelta,
130  "Register xmm%d should be 0x%016x%016x but is 0x%016x%016x.\n",
131  num, nXmmBuf[num * 2 + 1], nXmmBuf[num * 2],
132  mXmmBuf[num * 2 + 1], mXmmBuf[num * 2]);
133  return false;
134  }
135  return true;
136 }
137 
138 void
139 X86NativeTrace::check(NativeTraceRecord *record)
140 {
141  nState.update(this);
142  mState.update(record->getThread());
143 
144  if (record->getStaticInst()->isSyscall())
145  {
146  checkRcx = false;
147  checkR11 = false;
148  oldRcxVal = mState.rcx;
149  oldRealRcxVal = nState.rcx;
150  oldR11Val = mState.r11;
151  oldRealR11Val = nState.r11;
152  }
153 
154  checkReg("rax", mState.rax, nState.rax);
155  checkRcxReg("rcx", mState.rcx, nState.rcx);
156  checkReg("rdx", mState.rdx, nState.rdx);
157  checkReg("rbx", mState.rbx, nState.rbx);
158  checkReg("rsp", mState.rsp, nState.rsp);
159  checkReg("rbp", mState.rbp, nState.rbp);
160  checkReg("rsi", mState.rsi, nState.rsi);
161  checkReg("rdi", mState.rdi, nState.rdi);
162  checkReg("r8", mState.r8, nState.r8);
163  checkReg("r9", mState.r9, nState.r9);
164  checkReg("r10", mState.r10, nState.r10);
165  checkR11Reg("r11", mState.r11, nState.r11);
166  checkReg("r12", mState.r12, nState.r12);
167  checkReg("r13", mState.r13, nState.r13);
168  checkReg("r14", mState.r14, nState.r14);
169  checkReg("r15", mState.r15, nState.r15);
170  checkReg("rip", mState.rip, nState.rip);
171  checkXMM(0, mState.xmm, nState.xmm);
172  checkXMM(1, mState.xmm, nState.xmm);
173  checkXMM(2, mState.xmm, nState.xmm);
174  checkXMM(3, mState.xmm, nState.xmm);
175  checkXMM(4, mState.xmm, nState.xmm);
176  checkXMM(5, mState.xmm, nState.xmm);
177  checkXMM(6, mState.xmm, nState.xmm);
178  checkXMM(7, mState.xmm, nState.xmm);
179  checkXMM(8, mState.xmm, nState.xmm);
180  checkXMM(9, mState.xmm, nState.xmm);
181  checkXMM(10, mState.xmm, nState.xmm);
182  checkXMM(11, mState.xmm, nState.xmm);
183  checkXMM(12, mState.xmm, nState.xmm);
184  checkXMM(13, mState.xmm, nState.xmm);
185  checkXMM(14, mState.xmm, nState.xmm);
186  checkXMM(15, mState.xmm, nState.xmm);
187 }
188 
189 } // namespace Trace
190 
192 //
193 // ExeTracer Simulation Object
194 //
195 Trace::X86NativeTrace *
196 X86NativeTraceParams::create()
197 {
198  return new Trace::X86NativeTrace(this);
199 }
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:222
X86ISA::FLOATREG_MMX
static FloatRegIndex FLOATREG_MMX(int index)
Definition: float.hh:117
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
ThreadContext::pcState
virtual TheISA::PCState pcState() const =0
ThreadContext::readIntReg
virtual RegVal readIntReg(RegIndex reg_idx) const =0
Trace::X86NativeTrace::checkXMM
bool checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[])
Definition: nativetrace.cc:125
Trace::NativeTrace::checkReg
bool checkReg(const char *regName, T &val, T &realVal)
Definition: nativetrace.hh:89
letoh
T letoh(T value)
Definition: byteswap.hh:141
StaticInst::isSyscall
bool isSyscall() const
Definition: static_inst.hh:197
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition: thread_context.hh:91
Trace::X86NativeTrace::check
void check(NativeTraceRecord *record)
Definition: nativetrace.cc:139
ThreadContext::readFloatReg
virtual RegVal readFloatReg(RegIndex reg_idx) const =0
Trace::InstRecord::getThread
ThreadContext * getThread() const
Definition: insttracer.hh:225
isa_traits.hh
Trace::X86NativeTrace::ThreadState::update
void update(NativeTrace *parent)
Definition: nativetrace.cc:42
Trace::X86NativeTrace::checkR11Reg
bool checkR11Reg(const char *regName, uint64_t &, uint64_t &)
Definition: nativetrace.cc:115
thread_context.hh
SimObject::name
virtual const std::string name() const
Definition: sim_object.hh:128
Trace::X86NativeTrace::X86NativeTrace
X86NativeTrace(const Params *p)
Definition: nativetrace.cc:97
Trace::NativeTrace::read
void read(void *ptr, size_t size)
Definition: nativetrace.hh:101
Trace::X86NativeTrace::checkRcxReg
bool checkRcxReg(const char *regName, uint64_t &, uint64_t &)
Definition: nativetrace.cc:105
Trace::ExeTracer::Params
ExeTracerParams Params
Definition: exetrace.hh:62
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
Trace::InstRecord::getStaticInst
StaticInstPtr getStaticInst() const
Definition: insttracer.hh:226
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