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decoder.hh
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28 
29 #ifndef __ARCH_SPARC_DECODER_HH__
30 #define __ARCH_SPARC_DECODER_HH__
31 
33 #include "arch/sparc/registers.hh"
34 #include "arch/types.hh"
35 #include "cpu/static_inst.hh"
36 
37 namespace SparcISA
38 {
39 
40 class ISA;
41 class Decoder
42 {
43  protected:
44  // The extended machine instruction being generated
46  bool instDone;
48 
49  public:
50  Decoder(ISA* isa = nullptr) : instDone(false), asi(0)
51  {}
52 
53  void process() {}
54 
55  void
57  {
58  instDone = false;
59  }
60 
61  // Use this to give data to the predecoder. This should be used
62  // when there is control flow.
63  void
64  moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
65  {
66  emi = betoh(inst);
67  // The I bit, bit 13, is used to figure out where the ASI
68  // should come from. Use that in the ExtMachInst. This is
69  // slightly redundant, but it removes the need to put a condition
70  // into all the execute functions
71  if (emi & (1 << 13)) {
72  emi |= (static_cast<ExtMachInst>(
73  asi << (sizeof(MachInst) * 8)));
74  } else {
75  emi |= (static_cast<ExtMachInst>(bits(emi, 12, 5))
76  << (sizeof(MachInst) * 8));
77  }
78  instDone = true;
79  }
80 
81  bool
83  {
84  return true;
85  }
86 
87  bool
89  {
90  return instDone;
91  }
92 
93  void
95  {
96  asi = _asi;
97  }
98 
99  void takeOverFrom(Decoder *old) {}
100 
101  protected:
104 
105  public:
107 
113  {
114  return defaultCache.decode(this, mach_inst, addr);
115  }
116 
119  {
120  if (!instDone)
121  return NULL;
122  instDone = false;
123  return decode(emi, nextPC.instAddr());
124  }
125 };
126 
127 } // namespace SparcISA
128 
129 #endif // __ARCH_SPARC_DECODER_HH__
static GenericISA::BasicDecodeCache defaultCache
A cache of decoded instruction objects.
Definition: decoder.hh:103
Addr instAddr() const
Returns the memory address the bytes of this instruction came from.
Definition: types.hh:68
bool needMoreBytes()
Definition: decoder.hh:82
uint32_t MachInst
Definition: types.hh:38
ip6_addr_t addr
Definition: inet.hh:330
uint64_t RegVal
Definition: types.hh:166
void setContext(RegVal _asi)
Definition: decoder.hh:94
Bitfield< 4 > pc
StaticInstPtr decode(SparcISA::PCState &nextPC)
Definition: decoder.hh:118
Decoder(ISA *isa=nullptr)
Definition: decoder.hh:50
void process()
Definition: decoder.hh:53
StaticInstPtr decode(TheISA::Decoder *const decoder, TheISA::ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decode_cache.cc:40
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
ExtMachInst emi
Definition: decoder.hh:45
Definition: asi.cc:31
void takeOverFrom(Decoder *old)
Definition: decoder.hh:99
void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
Definition: decoder.hh:64
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decoder.hh:112
StaticInstPtr decodeInst(ExtMachInst mach_inst)
T betoh(T value)
Definition: byteswap.hh:143
uint64_t ExtMachInst
Definition: types.hh:39
T bits(T val, int first, int last)
Extract the bitfield from position &#39;first&#39; to &#39;last&#39; (inclusive) from &#39;val&#39; and right justify it...
Definition: bitfield.hh:71
bool instReady()
Definition: decoder.hh:88

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