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tarmac_tracer.cc
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37 
38 #include "tarmac_tracer.hh"
39 
40 #include <string>
41 
42 #include "arch/arm/system.hh"
43 #include "cpu/base.hh"
44 
45 namespace Trace {
46 
47 std::string
49 {
50  auto id = thread->getCpuPtr()->cpuId();
51  return "cpu" + std::to_string(id);
52 }
53 
55  : InstTracer(p),
56  startTick(p->start_tick),
57  endTick(p->end_tick)
58 {
59  // Wrong parameter setting: The trace end happens before the
60  // trace start.
62  "Tarmac start point: %lu is bigger than "
63  "Tarmac end point: %lu\n", startTick, endTick);
64 
65  // By default cpu tracers in gem5 are not tracing faults
66  // (exceptions).
67  // This is not in compliance with the Tarmac specification:
68  // instructions like SVC, SMC, HVC have to be traced.
69  // Tarmac Tracer is then automatically enabling this behaviour.
70  setDebugFlag("ExecFaulting");
71 }
72 
73 InstRecord *
75  const StaticInstPtr staticInst,
77  const StaticInstPtr macroStaticInst)
78 {
79  // Check if we need to start tracing since we have passed the
80  // tick start point.
81  if (when < startTick || when > endTick)
82  return nullptr;
83 
84  if (ArmSystem::highestELIs64(tc)) {
85  // TarmacTracerV8
86  return new TarmacTracerRecordV8(when, tc, staticInst, pc, *this,
87  macroStaticInst);
88  } else {
89  // TarmacTracer
90  return new TarmacTracerRecord(when, tc, staticInst, pc, *this,
91  macroStaticInst);
92  }
93 }
94 
95 } // namespace Trace
96 
98 TarmacTracerParams::create()
99 {
100  return new Trace::TarmacTracer(this);
101 }
InstRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, ArmISA::PCState pc, const StaticInstPtr macroStaticInst=NULL)
Generates a TarmacTracerRecord, depending on the Tarmac version.
Tarmac Tracer: this tracer generates a new Tarmac Record for every instruction being executed in gem5...
Tick startTick
Definition: stat_control.cc:69
bool highestELIs64() const
Returns true if the register width of the highest implemented exception level is 64 bits (ARMv8) ...
Definition: system.hh:193
virtual BaseCPU * getCpuPtr()=0
Tick startTick
startTick and endTick allow to trace a specific window of ticks rather than the entire CPU execution...
int cpuId() const
Reads this CPU&#39;s ID.
Definition: base.hh:179
ThreadContext is the external interface to all thread state for anything outside of the CPU...
void setDebugFlag(const char *string)
Definition: debug.cc:177
Bitfield< 4 > pc
uint64_t Tick
Tick count type.
Definition: types.hh:61
friend class TarmacTracerRecord
TarmacTracer(const Params *p)
TarmacTracerParams Params
friend class TarmacTracerRecordV8
std::string tarmacCpuName() const
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
Bitfield< 0 > p
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:181
ThreadContext * thread
const std::string to_string(sc_enc enc)
Definition: sc_fxdefs.cc:60

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