gem5  v20.0.0.3
O3ThreadContext< Impl > Member List

This is the complete list of members for O3ThreadContext< Impl >, including all inherited members.

activate() overrideO3ThreadContext< Impl >virtual
Active enum valueThreadContext
clearArchRegs() overrideO3ThreadContext< Impl >virtual
compare(ThreadContext *one, ThreadContext *two)ThreadContextstatic
conditionalSquash()O3ThreadContext< Impl >inline
contextId() const overrideO3ThreadContext< Impl >inlinevirtual
copyArchRegs(ThreadContext *tc) overrideO3ThreadContext< Impl >virtual
cpuO3ThreadContext< Impl >
cpuId() const overrideO3ThreadContext< Impl >inlinevirtual
DefaultFloatResultThreadContextstatic
DefaultIntResultThreadContextstatic
descheduleInstCountEvent(Event *event) overrideO3ThreadContext< Impl >inlinevirtual
dumpFuncProfile() overrideO3ThreadContext< Impl >virtual
exit()ThreadContextinlinevirtual
flattenRegId(const RegId &regId) const overrideO3ThreadContext< Impl >virtual
floatResultThreadContext
floatsThreadContextstatic
getCheckerCpuPtr() overrideO3ThreadContext< Impl >inlinevirtual
getCpuPtr() overrideO3ThreadContext< Impl >inlinevirtual
getCurrentInstCount() overrideO3ThreadContext< Impl >inlinevirtual
getDecoderPtr() overrideO3ThreadContext< Impl >inlinevirtual
getDTBPtr() overrideO3ThreadContext< Impl >inlinevirtual
getIsaPtr() overrideO3ThreadContext< Impl >inlinevirtual
getITBPtr() overrideO3ThreadContext< Impl >inlinevirtual
getKernelStats() overrideO3ThreadContext< Impl >inlinevirtual
getPhysProxy() overrideO3ThreadContext< Impl >inlinevirtual
getProcessPtr() overrideO3ThreadContext< Impl >inlinevirtual
getQuiesceEvent() overrideO3ThreadContext< Impl >inlinevirtual
getSystemPtr() overrideO3ThreadContext< Impl >inlinevirtual
getVirtProxy() overrideO3ThreadContext< Impl >virtual
getWritableVecPredReg(const RegId &id) overrideO3ThreadContext< Impl >inlinevirtual
getWritableVecPredRegFlat(RegIndex idx) overrideO3ThreadContext< Impl >virtual
getWritableVecReg(const RegId &id) overrideO3ThreadContext< Impl >inlinevirtual
getWritableVecRegFlat(RegIndex idx) overrideO3ThreadContext< Impl >virtual
halt() overrideO3ThreadContext< Impl >virtual
Halted enum valueThreadContext
Halting enum valueThreadContext
initMemProxies(ThreadContext *tc) overrideO3ThreadContext< Impl >inlinevirtual
instAddr() const overrideO3ThreadContext< Impl >inlinevirtual
intOffsetThreadContext
intResultThreadContext
intsThreadContextstatic
MachInst typedefThreadContextprotected
microPC() const overrideO3ThreadContext< Impl >inlinevirtual
nextInstAddr() const overrideO3ThreadContext< Impl >inlinevirtual
O3CPU typedefO3ThreadContext< Impl >
pcState() const overrideO3ThreadContext< Impl >inlinevirtual
pcState(const TheISA::PCState &val) overrideO3ThreadContext< Impl >virtual
pcStateNoRecord(const TheISA::PCState &val) overrideO3ThreadContext< Impl >virtual
profileClear() overrideO3ThreadContext< Impl >virtual
profileSample() overrideO3ThreadContext< Impl >virtual
quiesce()ThreadContext
quiesceTick(Tick resume)ThreadContext
readCCReg(RegIndex reg_idx) const overrideO3ThreadContext< Impl >inlinevirtual
readCCRegFlat(RegIndex idx) const overrideO3ThreadContext< Impl >virtual
readFloatReg(RegIndex reg_idx) const overrideO3ThreadContext< Impl >inlinevirtual
readFloatRegFlat(RegIndex idx) const overrideO3ThreadContext< Impl >virtual
readFuncExeInst() const overrideO3ThreadContext< Impl >inlinevirtual
readIntReg(RegIndex reg_idx) const overrideO3ThreadContext< Impl >inlinevirtual
readIntRegFlat(RegIndex idx) const overrideO3ThreadContext< Impl >virtual
readLastActivate() overrideO3ThreadContext< Impl >virtual
readLastSuspend() overrideO3ThreadContext< Impl >virtual
readMiscReg(RegIndex misc_reg) overrideO3ThreadContext< Impl >inlinevirtual
readMiscRegNoEffect(RegIndex misc_reg) const overrideO3ThreadContext< Impl >inlinevirtual
readReg(RegIndex reg_idx)O3ThreadContext< Impl >inline
readStCondFailures() const overrideO3ThreadContext< Impl >inlinevirtual
readVec16BitLaneReg(const RegId &id) const overrideO3ThreadContext< Impl >inlinevirtual
readVec32BitLaneReg(const RegId &id) const overrideO3ThreadContext< Impl >inlinevirtual
readVec64BitLaneReg(const RegId &id) const overrideO3ThreadContext< Impl >inlinevirtual
readVec8BitLaneReg(const RegId &id) const overrideO3ThreadContext< Impl >inlinevirtual
readVecElem(const RegId &reg) const overrideO3ThreadContext< Impl >inlinevirtual
readVecElemFlat(RegIndex idx, const ElemIndex &elemIndex) const overrideO3ThreadContext< Impl >virtual
readVecLaneFlat(RegIndex idx, int lId) constO3ThreadContext< Impl >inline
readVecPredReg(const RegId &id) const overrideO3ThreadContext< Impl >inlinevirtual
readVecPredRegFlat(RegIndex idx) const overrideO3ThreadContext< Impl >virtual
readVecReg(const RegId &id) const overrideO3ThreadContext< Impl >inlinevirtual
readVecRegFlat(RegIndex idx) const overrideO3ThreadContext< Impl >virtual
regStats(const std::string &name) overrideO3ThreadContext< Impl >virtual
remove(PCEvent *e) overrideO3ThreadContext< Impl >inlinevirtual
schedule(PCEvent *e) overrideO3ThreadContext< Impl >inlinevirtual
scheduleInstCountEvent(Event *event, Tick count) overrideO3ThreadContext< Impl >inlinevirtual
setCCReg(RegIndex reg_idx, RegVal val) overrideO3ThreadContext< Impl >inlinevirtual
setCCRegFlat(RegIndex idx, RegVal val) overrideO3ThreadContext< Impl >virtual
setContextId(ContextID id) overrideO3ThreadContext< Impl >inlinevirtual
setFloatReg(RegIndex reg_idx, RegVal val) overrideO3ThreadContext< Impl >inlinevirtual
setFloatRegFlat(RegIndex idx, RegVal val) overrideO3ThreadContext< Impl >virtual
setIntReg(RegIndex reg_idx, RegVal val) overrideO3ThreadContext< Impl >inlinevirtual
setIntRegFlat(RegIndex idx, RegVal val) overrideO3ThreadContext< Impl >virtual
setMiscReg(RegIndex misc_reg, RegVal val) overrideO3ThreadContext< Impl >virtual
setMiscRegNoEffect(RegIndex misc_reg, RegVal val) overrideO3ThreadContext< Impl >virtual
setNPC(Addr val)ThreadContextinline
setProcessPtr(Process *p) overrideO3ThreadContext< Impl >inlinevirtual
setStatus(Status new_status) overrideO3ThreadContext< Impl >inlinevirtual
setStCondFailures(unsigned sc_failures) overrideO3ThreadContext< Impl >inlinevirtual
setThreadId(int id) overrideO3ThreadContext< Impl >inlinevirtual
setVecElem(const RegId &reg, const VecElem &val) overrideO3ThreadContext< Impl >inlinevirtual
setVecElemFlat(RegIndex idx, const ElemIndex &elemIdx, const VecElem &val) overrideO3ThreadContext< Impl >virtual
setVecLane(const RegId &reg, const LaneData< LaneSize::Byte > &val) overrideO3ThreadContext< Impl >inlinevirtual
setVecLane(const RegId &reg, const LaneData< LaneSize::TwoByte > &val) overrideO3ThreadContext< Impl >inlinevirtual
setVecLane(const RegId &reg, const LaneData< LaneSize::FourByte > &val) overrideO3ThreadContext< Impl >inlinevirtual
setVecLane(const RegId &reg, const LaneData< LaneSize::EightByte > &val) overrideO3ThreadContext< Impl >inlinevirtual
setVecLaneFlat(int idx, int lId, const LD &val)O3ThreadContext< Impl >inline
setVecPredReg(const RegId &reg, const VecPredRegContainer &val) overrideO3ThreadContext< Impl >inlinevirtual
setVecPredRegFlat(RegIndex idx, const VecPredRegContainer &val) overrideO3ThreadContext< Impl >virtual
setVecReg(const RegId &reg, const VecRegContainer &val) overrideO3ThreadContext< Impl >inlinevirtual
setVecRegFlat(RegIndex idx, const VecRegContainer &val) overrideO3ThreadContext< Impl >virtual
socketId() const overrideO3ThreadContext< Impl >inlinevirtual
status() const overrideO3ThreadContext< Impl >inlinevirtual
Status enum nameThreadContext
suspend() overrideO3ThreadContext< Impl >virtual
Suspended enum valueThreadContext
syscall(Fault *fault) overrideO3ThreadContext< Impl >inlinevirtual
takeOverFrom(ThreadContext *old_context) overrideO3ThreadContext< Impl >virtual
threadO3ThreadContext< Impl >
threadId() const overrideO3ThreadContext< Impl >inlinevirtual
VecElem typedefThreadContextprotected
VecPredRegContainer typedefThreadContextprotected
VecRegContainer typedefThreadContextprotected
~ThreadContext()ThreadContextinlinevirtual

Generated on Fri Jul 3 2020 15:53:18 for gem5 by doxygen 1.8.13