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29 #ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
30 #define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
34 #include <unordered_map>
38 #include "mem/ruby/protocol/DMASequencerRequestType.hh"
40 #include "params/DMASequencer.hh"
88 #endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
bool isDeadlockEventScheduled() const override
void descheduleDeadlockEvent() override
std::unordered_map< Addr, DMARequest > RequestTable
int m_max_outstanding_requests
RequestTable m_RequestTable
int outstandingCount() const override
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
void dataCallback(const DataBlock &dblk, const Addr &addr)
DMASequencerParams Params
DMARequest(uint64_t start_paddr, int len, bool write, int bytes_completed, int bytes_issued, uint8_t *data, PacketPtr pkt)
void recordRequestType(DMASequencerRequestType requestType)
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
DMASequencer(const Params *)
void issueNext(const Addr &addr)
RequestStatus makeRequest(PacketPtr pkt) override
uint64_t m_data_block_mask
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
void ackCallback(const Addr &addr)
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