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| uint64_t | ArmISA::getArgument (ThreadContext *tc, int &number, uint16_t size, bool fp) |
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| static void | ArmISA::copyVecRegs (ThreadContext *src, ThreadContext *dest) |
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| void | ArmISA::copyRegs (ThreadContext *src, ThreadContext *dest) |
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| void | ArmISA::sendEvent (ThreadContext *tc) |
| | Send an event (SEV) to a specific PE if there isn't already a pending event. More...
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| bool | ArmISA::isSecure (ThreadContext *tc) |
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| bool | ArmISA::isSecureBelowEL3 (ThreadContext *tc) |
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| ExceptionLevel | ArmISA::debugTargetFrom (ThreadContext *tc, bool secure) |
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| bool | ArmISA::inAArch64 (ThreadContext *tc) |
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| bool | ArmISA::longDescFormatInUse (ThreadContext *tc) |
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| RegVal | ArmISA::readMPIDR (ArmSystem *arm_sys, ThreadContext *tc) |
| | This helper function is either returing the value of MPIDR_EL1 (by calling getMPIDR), or it is issuing a read to VMPIDR_EL2 (as it happens in virtualized systems) More...
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| RegVal | ArmISA::getMPIDR (ArmSystem *arm_sys, ThreadContext *tc) |
| | This helper function is returning the value of MPIDR_EL1. More...
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| static RegVal | ArmISA::getAff2 (ArmSystem *arm_sys, ThreadContext *tc) |
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| static RegVal | ArmISA::getAff1 (ArmSystem *arm_sys, ThreadContext *tc) |
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| static RegVal | ArmISA::getAff0 (ArmSystem *arm_sys, ThreadContext *tc) |
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| RegVal | ArmISA::getAffinity (ArmSystem *arm_sys, ThreadContext *tc) |
| | Retrieves MPIDR_EL1. More...
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| bool | ArmISA::HavePACExt (ThreadContext *tc) |
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| bool | ArmISA::HaveVirtHostExt (ThreadContext *tc) |
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| ExceptionLevel | ArmISA::s1TranslationRegime (ThreadContext *tc, ExceptionLevel el) |
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| bool | ArmISA::HaveSecureEL2Ext (ThreadContext *tc) |
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| bool | ArmISA::IsSecureEL2Enabled (ThreadContext *tc) |
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| bool | ArmISA::EL2Enabled (ThreadContext *tc) |
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| bool | ArmISA::ELIs64 (ThreadContext *tc, ExceptionLevel el) |
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| bool | ArmISA::ELIs32 (ThreadContext *tc, ExceptionLevel el) |
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| bool | ArmISA::ELIsInHost (ThreadContext *tc, ExceptionLevel el) |
| | Returns true if the current exception level el is executing a Host OS or an application of a Host OS (Armv8.1 Virtualization Host Extensions). More...
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| std::pair< bool, bool > | ArmISA::ELUsingAArch32K (ThreadContext *tc, ExceptionLevel el) |
| | This function checks whether selected EL provided as an argument is using the AArch32 ISA. More...
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| bool | ArmISA::haveAArch32EL (ThreadContext *tc, ExceptionLevel el) |
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| std::pair< bool, bool > | ArmISA::ELStateUsingAArch32K (ThreadContext *tc, ExceptionLevel el, bool secure) |
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| bool | ArmISA::ELStateUsingAArch32 (ThreadContext *tc, ExceptionLevel el, bool secure) |
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| bool | ArmISA::isBigEndian64 (const ThreadContext *tc) |
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| bool | ArmISA::badMode32 (ThreadContext *tc, OperatingMode mode) |
| | badMode is checking if the execution mode provided as an argument is valid and implemented for AArch32 More...
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| bool | ArmISA::badMode (ThreadContext *tc, OperatingMode mode) |
| | badMode is checking if the execution mode provided as an argument is valid and implemented. More...
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| int | ArmISA::computeAddrTop (ThreadContext *tc, bool selbit, bool isInstr, TCR tcr, ExceptionLevel el) |
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| Addr | ArmISA::purifyTaggedAddr (Addr addr, ThreadContext *tc, ExceptionLevel el, TCR tcr, bool isInstr) |
| | Removes the tag from tagged addresses if that mode is enabled. More...
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| Addr | ArmISA::purifyTaggedAddr (Addr addr, ThreadContext *tc, ExceptionLevel el, bool isInstr) |
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| Addr | ArmISA::truncPage (Addr addr) |
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| Addr | ArmISA::roundPage (Addr addr) |
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| Fault | ArmISA::mcrMrc15Trap (const MiscRegIndex miscReg, ExtMachInst machInst, ThreadContext *tc, uint32_t imm) |
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| bool | ArmISA::mcrMrc15TrapToHyp (const MiscRegIndex miscReg, ThreadContext *tc, uint32_t iss, ExceptionClass *ec) |
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| bool | ArmISA::mcrMrc14TrapToHyp (const MiscRegIndex miscReg, HCR hcr, CPSR cpsr, SCR scr, HDCR hdcr, HSTR hstr, HCPTR hcptr, uint32_t iss) |
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| Fault | ArmISA::mcrrMrrc15Trap (const MiscRegIndex miscReg, ExtMachInst machInst, ThreadContext *tc, uint32_t imm) |
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| bool | ArmISA::mcrrMrrc15TrapToHyp (const MiscRegIndex miscReg, ThreadContext *tc, uint32_t iss, ExceptionClass *ec) |
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| Fault | ArmISA::AArch64AArch32SystemAccessTrap (const MiscRegIndex miscReg, ExtMachInst machInst, ThreadContext *tc, uint32_t imm, ExceptionClass ec) |
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| bool | ArmISA::isAArch64AArch32SystemAccessTrapEL1 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerHypTrap (const MiscRegIndex miscReg, ThreadContext *tc, ExceptionClass *ec) |
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| bool | ArmISA::isGenericTimerCommonEL0HypTrap (const MiscRegIndex miscReg, ThreadContext *tc, ExceptionClass *ec) |
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| bool | ArmISA::isGenericTimerPhysHypTrap (const MiscRegIndex miscReg, ThreadContext *tc, ExceptionClass *ec) |
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| bool | ArmISA::condGenericTimerPhysHypTrap (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerSystemAccessTrapEL1 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::condGenericTimerSystemAccessTrapEL1 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isAArch64AArch32SystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerSystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerCommonEL0SystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerPhysEL0SystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerPhysEL1SystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerVirtSystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::condGenericTimerCommonEL0SystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::condGenericTimerCommonEL1SystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::condGenericTimerPhysEL1SystemAccessTrapEL2 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::isGenericTimerSystemAccessTrapEL3 (const MiscRegIndex miscReg, ThreadContext *tc) |
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| bool | ArmISA::decodeMrsMsrBankedReg (uint8_t sysM, bool r, bool &isIntReg, int ®Idx, CPSR cpsr, SCR scr, NSACR nsacr, bool checkSecurity) |
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| bool | ArmISA::isUnpriviledgeAccess (ThreadContext *tc) |
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| bool | ArmISA::SPAlignmentCheckEnabled (ThreadContext *tc) |
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| int | ArmISA::decodePhysAddrRange64 (uint8_t pa_enc) |
| | Returns the n. More...
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| uint8_t | ArmISA::encodePhysAddrRange64 (int pa_size) |
| | Returns the encoding corresponding to the specified n. More...
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