gem5  v20.1.0.0
bubble.h
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20 /*****************************************************************************
21 
22  bubble.h --
23 
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25 
26  *****************************************************************************/
27 
28 /*****************************************************************************
29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32 
33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 /******************************************************************************/
39 /*************************** bubble Class Definition ********************/
40 /******************************************************************************/
41 
42 #include "common.h"
43 
44 SC_MODULE( BUBBLE )
45 {
46  SC_HAS_PROCESS( BUBBLE );
47 
48  sc_in_clk clk;
49 
50  const sc_signal<bool>& reset;
51  const sc_signal<bool>& in_ok;
52  const sc_signal<bool>& out_ok;
53  sc_signal<bool>& instrb;
54  sc_signal<bool>& outstrb;
55  const signal_bool_vector &a1,&a2,&a3,&a4,&a5,&a6,&a7,&a8;// -128 to 127
56  signal_bool_vector &d1,&d2,&d3,&d4,&d5,&d6,&d7,&d8;// -128 to 127
57 
58  BUBBLE( sc_module_name NAME,
59  sc_clock& TICK_P,
60  const sc_signal<bool>& RESET,
61  const sc_signal<bool>& IN_OK,
62  const sc_signal<bool>& OUT_OK,
63  sc_signal<bool>& INSTRB,
64  sc_signal<bool>& OUTSTRB,
65  const signal_bool_vector& A1,
66  const signal_bool_vector& A2,
67  const signal_bool_vector& A3,
68  const signal_bool_vector& A4,
69  const signal_bool_vector& A5,
70  const signal_bool_vector& A6,
71  const signal_bool_vector& A7,
72  const signal_bool_vector& A8,
73  signal_bool_vector& D1,
74  signal_bool_vector& D2,
75  signal_bool_vector& D3,
76  signal_bool_vector& D4,
77  signal_bool_vector& D5,
78  signal_bool_vector& D6,
79  signal_bool_vector& D7,
80  signal_bool_vector& D8
81  )
82  :
83  reset (RESET),
84  in_ok (IN_OK),
85  out_ok (OUT_OK),
86  instrb (INSTRB),
87  outstrb (OUTSTRB),
88  a1 (A1), a2(A2), a3(A3), a4(A4),
89  a5 (A5), a6(A6), a7(A7), a8(A8),
90  d1 (D1), d2(D2), d3(D3), d4(D4),
91  d5 (D5), d6(D6), d7(D7), d8(D8)
92  {
93  clk(TICK_P);
94  SC_CTHREAD( entry, clk.pos() );
95  reset_signal_is(reset,true);
96  }
97  void entry();
98 };
99 
100 /******************************************************************************/
101 /*************************** bubble Entry Function **********************/
102 /******************************************************************************/
106 /******************************************************************************/
107 void
108 BUBBLE::entry()
109 {
110  bool_vector B[9];
111  bool_vector C[9];
112  int minel;
113  int x;
114  int i;
115  int j;
116 
117 // RESET INITIALIZATION
118 
119  while(true) {
120 
121  instrb.write(false);
122  outstrb.write(false);
123  minel = -500;
124  x = 0;
125  d1.write(0);
126  d2.write(0);
127  d3.write(0);
128  d4.write(0);
129  d5.write(0);
130  d6.write(0);
131  d7.write(0);
132  d8.write(0);
133  for (i = 1; i <= 8; i++) {
134  B[i] = 0;
135  }
136  for (i = 1; i <= 8; i++) {
137  C[i] = 0;
138  }
139  wait();
140 
141 // READY SIGNAL FOR INPUT DATA
142 
143  wait();
144  instrb.write(true);
145  wait();
146 
147 // INPUT HANDSHAKE & INPUT READ
148 
149  do { wait(); } while (!in_ok);
150 
151  instrb.write(false);
152  wait();
153 
154  B[1] = a1.read(); B[2] = a2.read(); B[3] = a3.read(); B[4] = a4.read();
155  B[5] = a5.read(); B[6] = a6.read(); B[7] = a7.read(); B[8] = a8.read();
156  wait();
157 
158 lout << "STARTING BUBBLE SORT" << endl;
159 // BUBBLE SORT ALGORITHM
160 
161  // EVERY ELEMENT
162  for (i = 1; i <= 7; i++) {
163 
164  if (B[i].to_int() > B[i+1].to_int()) { // if #1
165  for (j = 1; j <= 8; j++) {
166  C[j] = B[j]; // COPY
167  }
168 
169  B[i] = B[i+1];
170  B[i+1] = C[i];
171  minel = C[i].to_int(); // MOVE
172 
173  for (j = 1; j <= 8; j++) {
174  C[j] = B[j]; // COPY
175  }
176 
177  if (i >= 2) { // if #2
178  x = i;
179  while (x > 1) {
180  if (B[x].to_int() > B[x-1].to_int()) {
181  break;
182  }
183  else {
184  for (j = 1; j <= 8; j++) {
185  C[j] = B[j];
186  }
187 
188  B[x] = B[x-1];
189  B[x-1] = C[x]; // MOVE
190 
191  for (j = 1; j <= 8; j++) {
192  C[j] = B[j]; // COPY
193  }
194  } // end else
195  x = x-1;
196  } // end WHL Loop
197  } // end if #2
198  } // end if #1;
199  } // end FL3 Loop
200  wait();
201 
202 // WRITE OUTPUT & OUTPUT HANDSHAKE
203 
204  d1.write(C[1]); d2.write(C[2]); d3.write(C[3]); d4.write(C[4]);
205  d5.write(C[5]); d6.write(C[6]); d7.write(C[7]); d8.write(C[8]);
206  outstrb.write(true); // Ready to give output data
207  wait();
208 
209  do { wait(); } while (!out_ok);
210 
211  outstrb.write(false);
212  wait();
213 
214  } // end Reset Loop
215 
216 }
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
lout
ofstream lout("systemc.log")
Display to standard out and to logfile "systemc.log"
Stats::reset
void reset()
Definition: statistics.cc:569
SC_MODULE
SC_MODULE(BUBBLE)
Definition: bubble.h:44
common.h
ArmISA::j
Bitfield< 24 > j
Definition: miscregs_types.hh:54
bool_vector
sc_bv< 16 > bool_vector
Definition: common.h:43
RiscvISA::x
Bitfield< 3 > x
Definition: pagetable.hh:69
sc_core::sc_in_clk
sc_in< bool > sc_in_clk
Definition: sc_clock.hh:116
signal_bool_vector
sc_signal< bool_vector > signal_bool_vector
Definition: common.h:44
sc_core::wait
void wait()
Definition: sc_module.cc:653
SC_HAS_PROCESS
#define SC_HAS_PROCESS(name)
Definition: sc_module.hh:297
SC_CTHREAD
#define SC_CTHREAD(name, clk)
Definition: sc_module.hh:319
ArmISA::a1
Bitfield< 22 > a1
Definition: miscregs_types.hh:495
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