DefaultIEW handles both single threaded and SMT IEW (issue/execute/writeback). More...

#include <iew.hh>

Public Types
enum	Status { Active, Inactive }
	Overall IEW stage status. More...

enum	StageStatus { Running, Blocked, Idle, StartSquash, Squashing, Unblocking }
	Status for Issue, Execute, and Writeback stages. More...

Public Member Functions
	DefaultIEW (O3CPU _cpu, DerivO3CPUParams params)
	Constructs a DefaultIEW with the given parameters. More...

std::string	name () const
	Returns the name of the DefaultIEW stage. More...

void	regStats ()
	Registers statistics. More...

void	regProbePoints ()
	Registers probes. More...

void	startupStage ()
	Initializes stage; sends back the number of free IQ and LSQ entries. More...

void	clearStates (ThreadID tid)
	Clear all thread-specific states. More...

void	setTimeBuffer (TimeBuffer< TimeStruct > *tb_ptr)
	Sets main time buffer used for backwards communication. More...

void	setRenameQueue (TimeBuffer< RenameStruct > *rq_ptr)
	Sets time buffer for getting instructions coming from rename. More...

void	setIEWQueue (TimeBuffer< IEWStruct > *iq_ptr)
	Sets time buffer to pass on instructions to commit. More...

void	setActiveThreads (std::list< ThreadID > *at_ptr)
	Sets pointer to list of active threads. More...

void	setScoreboard (Scoreboard *sb_ptr)
	Sets pointer to the scoreboard. More...

void	drainSanityCheck () const
	Perform sanity checks after a drain. More...

bool	isDrained () const
	Has the stage drained? More...

void	takeOverFrom ()
	Takes over from another CPU's thread. More...

void	squash (ThreadID tid)
	Squashes instructions in IEW for a specific thread. More...

void	wakeDependents (const DynInstPtr &inst)
	Wakes all dependents of a completed instruction. More...

void	rescheduleMemInst (const DynInstPtr &inst)
	Tells memory dependence unit that a memory instruction needs to be rescheduled. More...

void	replayMemInst (const DynInstPtr &inst)
	Re-executes all rescheduled memory instructions. More...

void	blockMemInst (const DynInstPtr &inst)
	Moves memory instruction onto the list of cache blocked instructions. More...

void	cacheUnblocked ()
	Notifies that the cache has become unblocked. More...

void	instToCommit (const DynInstPtr &inst)
	Sends an instruction to commit through the time buffer. More...

void	skidInsert (ThreadID tid)
	Inserts unused instructions of a thread into the skid buffer. More...

int	skidCount ()
	Returns the max of the number of entries in all of the skid buffers. More...

bool	skidsEmpty ()
	Returns if all of the skid buffers are empty. More...

void	updateStatus ()
	Updates overall IEW status based on all of the stages' statuses. More...

void	resetEntries ()
	Resets entries of the IQ and the LSQ. More...

void	wakeCPU ()
	Tells the CPU to wakeup if it has descheduled itself due to no activity. More...

void	activityThisCycle ()
	Reports to the CPU that there is activity this cycle. More...

void	activateStage ()
	Tells CPU that the IEW stage is active and running. More...

void	deactivateStage ()
	Tells CPU that the IEW stage is inactive and idle. More...

bool	hasStoresToWB ()
	Returns if the LSQ has any stores to writeback. More...

bool	hasStoresToWB (ThreadID tid)
	Returns if the LSQ has any stores to writeback. More...

void	checkMisprediction (const DynInstPtr &inst)
	Check misprediction More...

void	setLastRetiredHtmUid (ThreadID tid, uint64_t htmUid)

void	tick ()
	Ticks IEW stage, causing Dispatch, the IQ, the LSQ, Execute, and Writeback to run for one cycle. More...

Public Attributes
IQ	instQueue
	Instruction queue. More...

LSQ	ldstQueue
	Load / store queue. More...

FUPool *	fuPool
	Pointer to the functional unit pool. More...

bool	updateLSQNextCycle
	Records if the LSQ needs to be updated on the next cycle, so that IEW knows if there will be activity on the next cycle. More...

Private Types
typedef Impl::CPUPol	CPUPol

typedef Impl::DynInstPtr	DynInstPtr

typedef Impl::O3CPU	O3CPU

typedef CPUPol::IQ	IQ

typedef CPUPol::RenameMap	RenameMap

typedef CPUPol::LSQ	LSQ

typedef CPUPol::TimeStruct	TimeStruct

typedef CPUPol::IEWStruct	IEWStruct

typedef CPUPol::RenameStruct	RenameStruct

typedef CPUPol::IssueStruct	IssueStruct

Private Member Functions
void	squashDueToBranch (const DynInstPtr &inst, ThreadID tid)
	Sends commit proper information for a squash due to a branch mispredict. More...

void	squashDueToMemOrder (const DynInstPtr &inst, ThreadID tid)
	Sends commit proper information for a squash due to a memory order violation. More...

void	block (ThreadID tid)
	Sets Dispatch to blocked, and signals back to other stages to block. More...

void	unblock (ThreadID tid)
	Unblocks Dispatch if the skid buffer is empty, and signals back to other stages to unblock. More...

void	dispatch (ThreadID tid)
	Determines proper actions to take given Dispatch's status. More...

void	dispatchInsts (ThreadID tid)
	Dispatches instructions to IQ and LSQ. More...

void	executeInsts ()
	Executes instructions. More...

void	writebackInsts ()
	Writebacks instructions. More...

unsigned	validInstsFromRename ()
	Returns the number of valid, non-squashed instructions coming from rename to dispatch. More...

bool	checkStall (ThreadID tid)
	Checks if any of the stall conditions are currently true. More...

void	checkSignalsAndUpdate (ThreadID tid)
	Processes inputs and changes state accordingly. More...

void	emptyRenameInsts (ThreadID tid)
	Removes instructions from rename from a thread's instruction list. More...

void	sortInsts ()
	Sorts instructions coming from rename into lists separated by thread. More...

void	updateExeInstStats (const DynInstPtr &inst)
	Updates execution stats based on the instruction. More...

void	printAvailableInsts ()
	Debug function to print instructions that are issued this cycle. More...

Private Attributes
Status	_status
	Overall stage status. More...

StageStatus	dispatchStatus [Impl::MaxThreads]
	Dispatch status. More...

StageStatus	exeStatus
	Execute status. More...

StageStatus	wbStatus
	Writeback status. More...

ProbePointArg< DynInstPtr > *	ppMispredict
	Probe points. More...

ProbePointArg< DynInstPtr > *	ppDispatch

ProbePointArg< DynInstPtr > *	ppExecute
	To probe when instruction execution begins. More...

ProbePointArg< DynInstPtr > *	ppToCommit
	To probe when instruction execution is complete. More...

TimeBuffer< TimeStruct > *	timeBuffer
	Pointer to main time buffer used for backwards communication. More...

TimeBuffer< TimeStruct >::wire	toFetch
	Wire to write information heading to previous stages. More...

TimeBuffer< TimeStruct >::wire	fromCommit
	Wire to get commit's output from backwards time buffer. More...

TimeBuffer< TimeStruct >::wire	toRename
	Wire to write information heading to previous stages. More...

TimeBuffer< RenameStruct > *	renameQueue
	Rename instruction queue interface. More...

TimeBuffer< RenameStruct >::wire	fromRename
	Wire to get rename's output from rename queue. More...

TimeBuffer< IssueStruct >	issueToExecQueue
	Issue stage queue. More...

TimeBuffer< IssueStruct >::wire	fromIssue
	Wire to read information from the issue stage time queue. More...

TimeBuffer< IEWStruct > *	iewQueue
	IEW stage time buffer. More...

TimeBuffer< IEWStruct >::wire	toCommit
	Wire to write infromation heading to commit. More...

std::queue< DynInstPtr >	insts [Impl::MaxThreads]
	Queue of all instructions coming from rename this cycle. More...

std::queue< DynInstPtr >	skidBuffer [Impl::MaxThreads]
	Skid buffer between rename and IEW. More...

Scoreboard *	scoreboard
	Scoreboard pointer. More...

O3CPU *	cpu
	CPU pointer. More...

bool	wroteToTimeBuffer
	Records if IEW has written to the time buffer this cycle, so that the CPU can deschedule itself if there is no activity. More...

bool	fetchRedirect [Impl::MaxThreads]
	Records if there is a fetch redirect on this cycle for each thread. More...

bool	updatedQueues
	Records if the queues have been changed (inserted or issued insts), so that IEW knows to broadcast the updated amount of free entries. More...

Cycles	commitToIEWDelay
	Commit to IEW delay. More...

Cycles	renameToIEWDelay
	Rename to IEW delay. More...

Cycles	issueToExecuteDelay
	Issue to execute delay. More...

unsigned	dispatchWidth
	Width of dispatch, in instructions. More...

unsigned	issueWidth
	Width of issue, in instructions. More...

unsigned	wbNumInst
	Index into queue of instructions being written back. More...

unsigned	wbCycle
	Cycle number within the queue of instructions being written back. More...

unsigned	wbWidth
	Writeback width. More...

ThreadID	numThreads
	Number of active threads. More...

std::list< ThreadID > *	activeThreads
	Pointer to list of active threads. More...

unsigned	skidBufferMax
	Maximum size of the skid buffer. More...

Stats::Scalar	iewIdleCycles
	Stat for total number of idle cycles. More...

Stats::Scalar	iewSquashCycles
	Stat for total number of squashing cycles. More...

Stats::Scalar	iewBlockCycles
	Stat for total number of blocking cycles. More...

Stats::Scalar	iewUnblockCycles
	Stat for total number of unblocking cycles. More...

Stats::Scalar	iewDispatchedInsts
	Stat for total number of instructions dispatched. More...

Stats::Scalar	iewDispSquashedInsts
	Stat for total number of squashed instructions dispatch skips. More...

Stats::Scalar	iewDispLoadInsts
	Stat for total number of dispatched load instructions. More...

Stats::Scalar	iewDispStoreInsts
	Stat for total number of dispatched store instructions. More...

Stats::Scalar	iewDispNonSpecInsts
	Stat for total number of dispatched non speculative instructions. More...

Stats::Scalar	iewIQFullEvents
	Stat for number of times the IQ becomes full. More...

Stats::Scalar	iewLSQFullEvents
	Stat for number of times the LSQ becomes full. More...

Stats::Scalar	memOrderViolationEvents
	Stat for total number of memory ordering violation events. More...

Stats::Scalar	predictedTakenIncorrect
	Stat for total number of incorrect predicted taken branches. More...

Stats::Scalar	predictedNotTakenIncorrect
	Stat for total number of incorrect predicted not taken branches. More...

Stats::Formula	branchMispredicts
	Stat for total number of mispredicted branches detected at execute. More...

Stats::Scalar	iewExecutedInsts
	Stat for total number of executed instructions. More...

Stats::Vector	iewExecLoadInsts
	Stat for total number of executed load instructions. More...

Stats::Scalar	iewExecSquashedInsts
	Stat for total number of executed store instructions. More...

Stats::Vector	iewExecutedSwp
	Number of executed software prefetches. More...

Stats::Vector	iewExecutedNop
	Number of executed nops. More...

Stats::Vector	iewExecutedRefs
	Number of executed meomory references. More...

Stats::Vector	iewExecutedBranches
	Number of executed branches. More...

Stats::Formula	iewExecStoreInsts
	Number of executed store instructions. More...

Stats::Formula	iewExecRate
	Number of instructions executed per cycle. More...

Stats::Vector	iewInstsToCommit
	Number of instructions sent to commit. More...

Stats::Vector	writebackCount
	Number of instructions that writeback. More...

Stats::Vector	producerInst
	Number of instructions that wake consumers. More...

Stats::Vector	consumerInst
	Number of instructions that wake up from producers. More...

Stats::Formula	wbRate
	Number of instructions per cycle written back. More...

Stats::Formula	wbFanout
	Average number of woken instructions per writeback. More...

Detailed Description

template<class Impl>
class DefaultIEW< Impl >

DefaultIEW handles both single threaded and SMT IEW (issue/execute/writeback).

It handles the dispatching of instructions to the LSQ/IQ as part of the issue stage, and has the IQ try to issue instructions each cycle. The execute latency is actually tied into the issue latency to allow the IQ to be able to do back-to-back scheduling without having to speculatively schedule instructions. This happens by having the IQ have access to the functional units, and the IQ gets the execution latencies from the FUs when it issues instructions. Instructions reach the execute stage on the last cycle of their execution, which is when the IQ knows to wake up any dependent instructions, allowing back to back scheduling. The execute portion of IEW separates memory instructions from non-memory instructions, either telling the LSQ to execute the instruction, or executing the instruction directly. The writeback portion of IEW completes the instructions by waking up any dependents, and marking the register ready on the scoreboard.

Definition at line 78 of file iew.hh.

Member Typedef Documentation

◆ CPUPol

template<class Impl >

typedef Impl::CPUPol DefaultIEW< Impl >::CPUPol

private

Definition at line 82 of file iew.hh.

◆ DynInstPtr

template<class Impl >

typedef Impl::DynInstPtr DefaultIEW< Impl >::DynInstPtr

private

Definition at line 83 of file iew.hh.

◆ IEWStruct

template<class Impl >

typedef CPUPol::IEWStruct DefaultIEW< Impl >::IEWStruct

private

Definition at line 91 of file iew.hh.

◆ IQ

template<class Impl >

typedef CPUPol::IQ DefaultIEW< Impl >::IQ

private

Definition at line 86 of file iew.hh.

◆ IssueStruct

template<class Impl >

typedef CPUPol::IssueStruct DefaultIEW< Impl >::IssueStruct

private

Definition at line 93 of file iew.hh.

◆ LSQ

template<class Impl >

typedef CPUPol::LSQ DefaultIEW< Impl >::LSQ

private

Definition at line 88 of file iew.hh.

◆ O3CPU

template<class Impl >

typedef Impl::O3CPU DefaultIEW< Impl >::O3CPU

private

Definition at line 84 of file iew.hh.

◆ RenameMap

template<class Impl >

typedef CPUPol::RenameMap DefaultIEW< Impl >::RenameMap

private

Definition at line 87 of file iew.hh.

◆ RenameStruct

template<class Impl >

typedef CPUPol::RenameStruct DefaultIEW< Impl >::RenameStruct

private

Definition at line 92 of file iew.hh.

◆ TimeStruct

template<class Impl >

typedef CPUPol::TimeStruct DefaultIEW< Impl >::TimeStruct

private

Definition at line 90 of file iew.hh.

Member Enumeration Documentation

◆ StageStatus

template<class Impl >

enum DefaultIEW::StageStatus

Status for Issue, Execute, and Writeback stages.

Enumerator
Running
Blocked
Idle
StartSquash
Squashing
Unblocking

Definition at line 105 of file iew.hh.

◆ Status

template<class Impl >

enum DefaultIEW::Status

Overall IEW stage status.

Used to determine if the CPU can deschedule itself due to a lack of activity.

Enumerator
Active
Inactive

Definition at line 99 of file iew.hh.

Constructor & Destructor Documentation

◆ DefaultIEW()

template<class Impl >

DefaultIEW< Impl >::DefaultIEW	(	O3CPU *	_cpu,
		DerivO3CPUParams *	params
	)

Member Function Documentation

◆ activateStage()

template<class Impl >

void DefaultIEW< Impl >::activateStage

inline

Tells CPU that the IEW stage is active and running.

Definition at line 894 of file iew_impl.hh.

References DPRINTF.

◆ activityThisCycle()

template<class Impl >

void DefaultIEW< Impl >::activityThisCycle

Reports to the CPU that there is activity this cycle.

Definition at line 886 of file iew_impl.hh.

References DPRINTF.

◆ block()

template<class Impl >

void DefaultIEW< Impl >::block ( ThreadID tid )

private

Sets Dispatch to blocked, and signals back to other stages to block.

Definition at line 549 of file iew_impl.hh.

References DPRINTF.

◆ blockMemInst()

template<class Impl >

void DefaultIEW< Impl >::blockMemInst ( const DynInstPtr & inst )

Moves memory instruction onto the list of cache blocked instructions.

Definition at line 606 of file iew_impl.hh.

◆ cacheUnblocked()

template<class Impl >

void DefaultIEW< Impl >::cacheUnblocked

Notifies that the cache has become unblocked.

Definition at line 613 of file iew_impl.hh.

◆ checkMisprediction()

template<class Impl >

void DefaultIEW< Impl >::checkMisprediction ( const DynInstPtr & inst )

Check misprediction

Definition at line 1677 of file iew_impl.hh.

References DPRINTF.

◆ checkSignalsAndUpdate()

template<class Impl >

void DefaultIEW< Impl >::checkSignalsAndUpdate ( ThreadID tid )

private

Processes inputs and changes state accordingly.

Definition at line 779 of file iew_impl.hh.

References DPRINTF, and Running.

◆ checkStall()

template<class Impl >

bool DefaultIEW< Impl >::checkStall ( ThreadID tid )

private

Checks if any of the stall conditions are currently true.

Definition at line 762 of file iew_impl.hh.

References DPRINTF.

◆ clearStates()

template<class Impl >

void DefaultIEW< Impl >::clearStates ( ThreadID tid )

Clear all thread-specific states.

Definition at line 325 of file iew_impl.hh.

◆ deactivateStage()

template<class Impl >

void DefaultIEW< Impl >::deactivateStage

inline

Tells CPU that the IEW stage is inactive and idle.

Definition at line 902 of file iew_impl.hh.

References DPRINTF.

◆ dispatch()

template<class Impl >

void DefaultIEW< Impl >::dispatch ( ThreadID tid )

private

Determines proper actions to take given Dispatch's status.

Definition at line 910 of file iew_impl.hh.

References DPRINTF, and Running.

◆ dispatchInsts()

template<class Impl >

void DefaultIEW< Impl >::dispatchInsts ( ThreadID tid )

private

Dispatches instructions to IQ and LSQ.

Definition at line 958 of file iew_impl.hh.

References curTick(), DPRINTF, and Running.

◆ drainSanityCheck()

template<class Impl >

void DefaultIEW< Impl >::drainSanityCheck

Perform sanity checks after a drain.

Definition at line 422 of file iew_impl.hh.

◆ emptyRenameInsts()

template<class Impl >

void DefaultIEW< Impl >::emptyRenameInsts ( ThreadID tid )

private

Removes instructions from rename from a thread's instruction list.

Definition at line 857 of file iew_impl.hh.

References DPRINTF.

◆ executeInsts()

template<class Impl >

void DefaultIEW< Impl >::executeInsts

private

Executes instructions.

In the case of memory operations, it informs the LSQ to execute the instructions. Also handles any redirects that occur due to the executed instructions.

Definition at line 1218 of file iew_impl.hh.

References DPRINTF, NoFault, panic, and Running.

◆ hasStoresToWB() [1/2]

template<class Impl >

bool DefaultIEW< Impl >::hasStoresToWB ( )

inline

Returns if the LSQ has any stores to writeback.

Definition at line 228 of file iew.hh.

References LSQ< Impl >::hasStoresToWB(), and DefaultIEW< Impl >::ldstQueue.

◆ hasStoresToWB() [2/2]

template<class Impl >

bool DefaultIEW< Impl >::hasStoresToWB ( ThreadID tid )

inline

Returns if the LSQ has any stores to writeback.

Definition at line 231 of file iew.hh.

References LSQ< Impl >::hasStoresToWB(), and DefaultIEW< Impl >::ldstQueue.

◆ instToCommit()

template<class Impl >

void DefaultIEW< Impl >::instToCommit ( const DynInstPtr & inst )

Sends an instruction to commit through the time buffer.

Definition at line 620 of file iew_impl.hh.

References DPRINTF.

◆ isDrained()

template<class Impl >

bool DefaultIEW< Impl >::isDrained

Has the stage drained?

Definition at line 393 of file iew_impl.hh.

References DPRINTF, and Running.

◆ name()

template<class Impl >

std::string DefaultIEW< Impl >::name

Returns the name of the DefaultIEW stage.

Definition at line 117 of file iew_impl.hh.

◆ printAvailableInsts()

template<class Impl >

void DefaultIEW< Impl >::printAvailableInsts

private

Debug function to print instructions that are issued this cycle.

Definition at line 1195 of file iew_impl.hh.

◆ regProbePoints()

template<class Impl >

void DefaultIEW< Impl >::regProbePoints

Registers probes.

Probe point with dynamic instruction as the argument used to probe when an instruction starts to execute.

Probe point with dynamic instruction as the argument used to probe when an instruction execution completes and it is marked ready to commit.

Definition at line 124 of file iew_impl.hh.

◆ regStats()

template<class Impl >

void DefaultIEW< Impl >::regStats

Registers statistics.

Definition at line 144 of file iew_impl.hh.

References name(), and Stats::total.

◆ replayMemInst()

template<class Impl >

void DefaultIEW< Impl >::replayMemInst ( const DynInstPtr & inst )

Re-executes all rescheduled memory instructions.

Definition at line 599 of file iew_impl.hh.

◆ rescheduleMemInst()

template<class Impl >

void DefaultIEW< Impl >::rescheduleMemInst ( const DynInstPtr & inst )

Tells memory dependence unit that a memory instruction needs to be rescheduled.

It will re-execute once replayMemInst() is called.

Definition at line 592 of file iew_impl.hh.

◆ resetEntries()

template<class Impl >

void DefaultIEW< Impl >::resetEntries ( )

Resets entries of the IQ and the LSQ.

◆ setActiveThreads()

template<class Impl >

void DefaultIEW< Impl >::setActiveThreads ( std::list< ThreadID > * at_ptr )

Sets pointer to list of active threads.

Definition at line 376 of file iew_impl.hh.

◆ setIEWQueue()

template<class Impl >

void DefaultIEW< Impl >::setIEWQueue ( TimeBuffer< IEWStruct > * iq_ptr )

Sets time buffer to pass on instructions to commit.

Definition at line 366 of file iew_impl.hh.

References TimeBuffer< T >::getWire().

◆ setLastRetiredHtmUid()

template<class Impl >

void DefaultIEW< Impl >::setLastRetiredHtmUid	(	ThreadID	tid,
		uint64_t	htmUid
	)

inline

Definition at line 241 of file iew.hh.

References DefaultIEW< Impl >::ldstQueue, and LSQ< Impl >::setLastRetiredHtmUid().

◆ setRenameQueue()

template<class Impl >

void DefaultIEW< Impl >::setRenameQueue ( TimeBuffer< RenameStruct > * rq_ptr )

Sets time buffer for getting instructions coming from rename.

Definition at line 356 of file iew_impl.hh.

References TimeBuffer< T >::getWire().

◆ setScoreboard()

template<class Impl >

void DefaultIEW< Impl >::setScoreboard ( Scoreboard * sb_ptr )

Sets pointer to the scoreboard.

Definition at line 386 of file iew_impl.hh.

◆ setTimeBuffer()

template<class Impl >

void DefaultIEW< Impl >::setTimeBuffer ( TimeBuffer< TimeStruct > * tb_ptr )

Sets main time buffer used for backwards communication.

Definition at line 338 of file iew_impl.hh.

References TimeBuffer< T >::getWire().

◆ skidCount()

template<class Impl >

int DefaultIEW< Impl >::skidCount

Returns the max of the number of entries in all of the skid buffers.

Definition at line 685 of file iew_impl.hh.

◆ skidInsert()

template<class Impl >

void DefaultIEW< Impl >::skidInsert ( ThreadID tid )

Inserts unused instructions of a thread into the skid buffer.

Definition at line 663 of file iew_impl.hh.

References DPRINTF.

◆ skidsEmpty()

template<class Impl >

bool DefaultIEW< Impl >::skidsEmpty

Returns if all of the skid buffers are empty.

Definition at line 704 of file iew_impl.hh.

◆ sortInsts()

template<class Impl >

void DefaultIEW< Impl >::sortInsts

private

Sorts instructions coming from rename into lists separated by thread.

Definition at line 843 of file iew_impl.hh.

References ArmISA::i.

◆ squash()

template<class Impl >

void DefaultIEW< Impl >::squash ( ThreadID tid )

Squashes instructions in IEW for a specific thread.

Definition at line 460 of file iew_impl.hh.

References DPRINTF.

◆ squashDueToBranch()

template<class Impl >

void DefaultIEW< Impl >::squashDueToBranch	(	const DynInstPtr &	inst,
		ThreadID	tid
	)

private

Sends commit proper information for a squash due to a branch mispredict.

Definition at line 496 of file iew_impl.hh.

References ArmISA::advancePC(), DPRINTF, and MipsISA::pc.

◆ squashDueToMemOrder()

template<class Impl >

void DefaultIEW< Impl >::squashDueToMemOrder	(	const DynInstPtr &	inst,
		ThreadID	tid
	)

private

Sends commit proper information for a squash due to a memory order violation.

Definition at line 522 of file iew_impl.hh.

References DPRINTF.

◆ startupStage()

template<class Impl >

void DefaultIEW< Impl >::startupStage

Initializes stage; sends back the number of free IQ and LSQ entries.

Definition at line 303 of file iew_impl.hh.

◆ takeOverFrom()

template<class Impl >

void DefaultIEW< Impl >::takeOverFrom

Takes over from another CPU's thread.

Definition at line 432 of file iew_impl.hh.

References ArmISA::i, and Running.

◆ tick()

template<class Impl >

void DefaultIEW< Impl >::tick

Ticks IEW stage, causing Dispatch, the IQ, the LSQ, Execute, and Writeback to run for one cycle.

Definition at line 1515 of file iew_impl.hh.

References DPRINTF, and Running.

◆ unblock()

template<class Impl >

void DefaultIEW< Impl >::unblock ( ThreadID tid )

private

Unblocks Dispatch if the skid buffer is empty, and signals back to other stages to unblock.

Definition at line 568 of file iew_impl.hh.

References DPRINTF, and Running.

◆ updateExeInstStats()

template<class Impl >

void DefaultIEW< Impl >::updateExeInstStats ( const DynInstPtr & inst )

private

Updates execution stats based on the instruction.

Definition at line 1645 of file iew_impl.hh.

References curTick(), and DTRACE.

◆ updateStatus()

template<class Impl >

void DefaultIEW< Impl >::updateStatus

Updates overall IEW status based on all of the stages' statuses.

Definition at line 721 of file iew_impl.hh.

References DPRINTF.

◆ validInstsFromRename()

template<class Impl >

unsigned DefaultIEW< Impl >::validInstsFromRename

private

Returns the number of valid, non-squashed instructions coming from rename to dispatch.

Definition at line 649 of file iew_impl.hh.

References ArmISA::i.

◆ wakeCPU()

template<class Impl >

void DefaultIEW< Impl >::wakeCPU

Tells the CPU to wakeup if it has descheduled itself due to no activity.

Used mainly by the LdWritebackEvent.

Definition at line 879 of file iew_impl.hh.

◆ wakeDependents()

template<class Impl >

void DefaultIEW< Impl >::wakeDependents ( const DynInstPtr & inst )

Wakes all dependents of a completed instruction.

Definition at line 585 of file iew_impl.hh.

◆ writebackInsts()

template<class Impl >

void DefaultIEW< Impl >::writebackInsts

private

Writebacks instructions.

In our model, the instruction's execute() function atomically reads registers, executes, and writes registers. Thus this writeback only wakes up dependent instructions, and informs the scoreboard of registers becoming ready.

Definition at line 1465 of file iew_impl.hh.

References DPRINTF, ArmISA::i, and NoFault.

Member Data Documentation

◆ _status

template<class Impl >

Status DefaultIEW< Impl >::_status

private

Overall stage status.

Definition at line 116 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ activeThreads

template<class Impl >

std::list<ThreadID>* DefaultIEW< Impl >::activeThreads

private

Pointer to list of active threads.

Definition at line 424 of file iew.hh.

◆ branchMispredicts

template<class Impl >

Stats::Formula DefaultIEW< Impl >::branchMispredicts

private

Stat for total number of mispredicted branches detected at execute.

Definition at line 458 of file iew.hh.

◆ commitToIEWDelay

template<class Impl >

Cycles DefaultIEW< Impl >::commitToIEWDelay

private

Commit to IEW delay.

Definition at line 389 of file iew.hh.

◆ consumerInst

template<class Impl >

Stats::Vector DefaultIEW< Impl >::consumerInst

private

Number of instructions that wake up from producers.

Definition at line 488 of file iew.hh.

◆ cpu

template<class Impl >

O3CPU* DefaultIEW< Impl >::cpu

private

CPU pointer.

Definition at line 355 of file iew.hh.

◆ dispatchStatus

template<class Impl >

StageStatus DefaultIEW< Impl >::dispatchStatus[Impl::MaxThreads]

private

Dispatch status.

Definition at line 118 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ dispatchWidth

template<class Impl >

unsigned DefaultIEW< Impl >::dispatchWidth

private

Width of dispatch, in instructions.

Definition at line 402 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ exeStatus

template<class Impl >

StageStatus DefaultIEW< Impl >::exeStatus

private

Execute status.

Definition at line 120 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ fetchRedirect

template<class Impl >

bool DefaultIEW< Impl >::fetchRedirect[Impl::MaxThreads]

private

Records if there is a fetch redirect on this cycle for each thread.

Definition at line 381 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ fromCommit

template<class Impl >

TimeBuffer<TimeStruct>::wire DefaultIEW< Impl >::fromCommit

private

Wire to get commit's output from backwards time buffer.

Definition at line 318 of file iew.hh.

◆ fromIssue

template<class Impl >

TimeBuffer<IssueStruct>::wire DefaultIEW< Impl >::fromIssue

private

Wire to read information from the issue stage time queue.

Definition at line 333 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ fromRename

template<class Impl >

TimeBuffer<RenameStruct>::wire DefaultIEW< Impl >::fromRename

private

Wire to get rename's output from rename queue.

Definition at line 327 of file iew.hh.

◆ fuPool

template<class Impl >

FUPool* DefaultIEW< Impl >::fuPool

Pointer to the functional unit pool.

Definition at line 373 of file iew.hh.

◆ iewBlockCycles

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewBlockCycles

private

Stat for total number of blocking cycles.

Definition at line 434 of file iew.hh.

◆ iewDispatchedInsts

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewDispatchedInsts

private

Stat for total number of instructions dispatched.

Definition at line 438 of file iew.hh.

◆ iewDispLoadInsts

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewDispLoadInsts

private

Stat for total number of dispatched load instructions.

Definition at line 442 of file iew.hh.

◆ iewDispNonSpecInsts

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewDispNonSpecInsts

private

Stat for total number of dispatched non speculative instructions.

Definition at line 446 of file iew.hh.

◆ iewDispSquashedInsts

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewDispSquashedInsts

private

Stat for total number of squashed instructions dispatch skips.

Definition at line 440 of file iew.hh.

◆ iewDispStoreInsts

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewDispStoreInsts

private

Stat for total number of dispatched store instructions.

Definition at line 444 of file iew.hh.

◆ iewExecLoadInsts

template<class Impl >

Stats::Vector DefaultIEW< Impl >::iewExecLoadInsts

private

Stat for total number of executed load instructions.

Definition at line 463 of file iew.hh.

◆ iewExecRate

template<class Impl >

Stats::Formula DefaultIEW< Impl >::iewExecRate

private

Number of instructions executed per cycle.

Definition at line 479 of file iew.hh.

◆ iewExecSquashedInsts

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewExecSquashedInsts

private

Stat for total number of executed store instructions.

Stat for total number of squashed instructions skipped at execute.

Definition at line 467 of file iew.hh.

◆ iewExecStoreInsts

template<class Impl >

Stats::Formula DefaultIEW< Impl >::iewExecStoreInsts

private

Number of executed store instructions.

Definition at line 477 of file iew.hh.

◆ iewExecutedBranches

template<class Impl >

Stats::Vector DefaultIEW< Impl >::iewExecutedBranches

private

Number of executed branches.

Definition at line 475 of file iew.hh.

◆ iewExecutedInsts

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewExecutedInsts

private

Stat for total number of executed instructions.

Definition at line 461 of file iew.hh.

◆ iewExecutedNop

template<class Impl >

Stats::Vector DefaultIEW< Impl >::iewExecutedNop

private

Number of executed nops.

Definition at line 471 of file iew.hh.

◆ iewExecutedRefs

template<class Impl >

Stats::Vector DefaultIEW< Impl >::iewExecutedRefs

private

Number of executed meomory references.

Definition at line 473 of file iew.hh.

◆ iewExecutedSwp

template<class Impl >

Stats::Vector DefaultIEW< Impl >::iewExecutedSwp

private

Number of executed software prefetches.

Definition at line 469 of file iew.hh.

◆ iewIdleCycles

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewIdleCycles

private

Stat for total number of idle cycles.

Definition at line 430 of file iew.hh.

◆ iewInstsToCommit

template<class Impl >

Stats::Vector DefaultIEW< Impl >::iewInstsToCommit

private

Number of instructions sent to commit.

Definition at line 482 of file iew.hh.

◆ iewIQFullEvents

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewIQFullEvents

private

Stat for number of times the IQ becomes full.

Definition at line 448 of file iew.hh.

◆ iewLSQFullEvents

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewLSQFullEvents

private

Stat for number of times the LSQ becomes full.

Definition at line 450 of file iew.hh.

◆ iewQueue

template<class Impl >

TimeBuffer<IEWStruct>* DefaultIEW< Impl >::iewQueue

private

IEW stage time buffer.

Holds ROB indices of instructions that can be marked as completed.

Definition at line 339 of file iew.hh.

◆ iewSquashCycles

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewSquashCycles

private

Stat for total number of squashing cycles.

Definition at line 432 of file iew.hh.

◆ iewUnblockCycles

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::iewUnblockCycles

private

Stat for total number of unblocking cycles.

Definition at line 436 of file iew.hh.

◆ instQueue

template<class Impl >

IQ DefaultIEW< Impl >::instQueue

Instruction queue.

Definition at line 367 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ insts

template<class Impl >

std::queue<DynInstPtr> DefaultIEW< Impl >::insts[Impl::MaxThreads]

private

Queue of all instructions coming from rename this cycle.

Definition at line 345 of file iew.hh.

◆ issueToExecQueue

template<class Impl >

TimeBuffer<IssueStruct> DefaultIEW< Impl >::issueToExecQueue

private

Issue stage queue.

Definition at line 330 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ issueToExecuteDelay

template<class Impl >

Cycles DefaultIEW< Impl >::issueToExecuteDelay

private

Issue to execute delay.

What this actually represents is the amount of time it takes for an instruction to wake up, be scheduled, and sent to a FU for execution.

Definition at line 399 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ issueWidth

template<class Impl >

unsigned DefaultIEW< Impl >::issueWidth

private

Width of issue, in instructions.

Definition at line 405 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ ldstQueue

template<class Impl >

LSQ DefaultIEW< Impl >::ldstQueue

Load / store queue.

Definition at line 370 of file iew.hh.

Referenced by DefaultIEW< Impl >::hasStoresToWB(), and DefaultIEW< Impl >::setLastRetiredHtmUid().

◆ memOrderViolationEvents

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::memOrderViolationEvents

private

Stat for total number of memory ordering violation events.

Definition at line 452 of file iew.hh.

◆ numThreads

template<class Impl >

ThreadID DefaultIEW< Impl >::numThreads

private

Number of active threads.

Definition at line 421 of file iew.hh.

◆ ppDispatch

template<class Impl >

ProbePointArg<DynInstPtr>* DefaultIEW< Impl >::ppDispatch

private

Definition at line 126 of file iew.hh.

◆ ppExecute

template<class Impl >

ProbePointArg<DynInstPtr>* DefaultIEW< Impl >::ppExecute

private

To probe when instruction execution begins.

Definition at line 128 of file iew.hh.

◆ ppMispredict

template<class Impl >

ProbePointArg<DynInstPtr>* DefaultIEW< Impl >::ppMispredict

private

Probe points.

Definition at line 125 of file iew.hh.

◆ ppToCommit

template<class Impl >

ProbePointArg<DynInstPtr>* DefaultIEW< Impl >::ppToCommit

private

To probe when instruction execution is complete.

Definition at line 130 of file iew.hh.

◆ predictedNotTakenIncorrect

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::predictedNotTakenIncorrect

private

Stat for total number of incorrect predicted not taken branches.

Definition at line 456 of file iew.hh.

◆ predictedTakenIncorrect

template<class Impl >

Stats::Scalar DefaultIEW< Impl >::predictedTakenIncorrect

private

Stat for total number of incorrect predicted taken branches.

Definition at line 454 of file iew.hh.

◆ producerInst

template<class Impl >

Stats::Vector DefaultIEW< Impl >::producerInst

private

Number of instructions that wake consumers.

Definition at line 486 of file iew.hh.

◆ renameQueue

template<class Impl >

TimeBuffer<RenameStruct>* DefaultIEW< Impl >::renameQueue

private

Rename instruction queue interface.

Definition at line 324 of file iew.hh.

◆ renameToIEWDelay

template<class Impl >

Cycles DefaultIEW< Impl >::renameToIEWDelay

private

Rename to IEW delay.

Definition at line 392 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ scoreboard

template<class Impl >

Scoreboard* DefaultIEW< Impl >::scoreboard

private

Scoreboard pointer.

Definition at line 351 of file iew.hh.

◆ skidBuffer

template<class Impl >

std::queue<DynInstPtr> DefaultIEW< Impl >::skidBuffer[Impl::MaxThreads]

private

Skid buffer between rename and IEW.

Definition at line 348 of file iew.hh.

◆ skidBufferMax

template<class Impl >

unsigned DefaultIEW< Impl >::skidBufferMax

private

Maximum size of the skid buffer.

Definition at line 427 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ timeBuffer

template<class Impl >

TimeBuffer<TimeStruct>* DefaultIEW< Impl >::timeBuffer

private

Pointer to main time buffer used for backwards communication.

Definition at line 312 of file iew.hh.

◆ toCommit

template<class Impl >

TimeBuffer<IEWStruct>::wire DefaultIEW< Impl >::toCommit

private

Wire to write infromation heading to commit.

Definition at line 342 of file iew.hh.

◆ toFetch

template<class Impl >

TimeBuffer<TimeStruct>::wire DefaultIEW< Impl >::toFetch

private

Wire to write information heading to previous stages.

Definition at line 315 of file iew.hh.

◆ toRename

template<class Impl >

TimeBuffer<TimeStruct>::wire DefaultIEW< Impl >::toRename

private

Wire to write information heading to previous stages.

Definition at line 321 of file iew.hh.

◆ updatedQueues

template<class Impl >

bool DefaultIEW< Impl >::updatedQueues

private

Records if the queues have been changed (inserted or issued insts), so that IEW knows to broadcast the updated amount of free entries.

Definition at line 386 of file iew.hh.

◆ updateLSQNextCycle

template<class Impl >

bool DefaultIEW< Impl >::updateLSQNextCycle

Records if the LSQ needs to be updated on the next cycle, so that IEW knows if there will be activity on the next cycle.

Definition at line 377 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ wbCycle

template<class Impl >

unsigned DefaultIEW< Impl >::wbCycle

private

Cycle number within the queue of instructions being written back.

Used in case there are too many instructions writing back at the current cycle and writesbacks need to be scheduled for the future. See comments in instToCommit().

Definition at line 415 of file iew.hh.

◆ wbFanout

template<class Impl >

Stats::Formula DefaultIEW< Impl >::wbFanout

private

Average number of woken instructions per writeback.

Definition at line 492 of file iew.hh.

◆ wbNumInst

template<class Impl >

unsigned DefaultIEW< Impl >::wbNumInst

private

Index into queue of instructions being written back.

Definition at line 408 of file iew.hh.

◆ wbRate

template<class Impl >

Stats::Formula DefaultIEW< Impl >::wbRate

private

Number of instructions per cycle written back.

Definition at line 490 of file iew.hh.

◆ wbStatus

template<class Impl >

StageStatus DefaultIEW< Impl >::wbStatus

private

Writeback status.

Definition at line 122 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ wbWidth

template<class Impl >

unsigned DefaultIEW< Impl >::wbWidth

private

Writeback width.

Definition at line 418 of file iew.hh.

Referenced by DefaultIEW< Impl >::DefaultIEW().

◆ writebackCount

template<class Impl >

Stats::Vector DefaultIEW< Impl >::writebackCount

private

Number of instructions that writeback.

Definition at line 484 of file iew.hh.

◆ wroteToTimeBuffer

template<class Impl >

bool DefaultIEW< Impl >::wroteToTimeBuffer

private

Records if IEW has written to the time buffer this cycle, so that the CPU can deschedule itself if there is no activity.

Definition at line 360 of file iew.hh.

The documentation for this class was generated from the following files:

cpu/o3/iew.hh
cpu/o3/iew_impl.hh

Public Types

Public Member Functions

Public Attributes

Private Types

Private Member Functions

Private Attributes

Detailed Description

template<class Impl> class DefaultIEW< Impl >

Member Typedef Documentation

◆ CPUPol

◆ DynInstPtr

◆ IEWStruct

◆ IQ

◆ IssueStruct

◆ LSQ

◆ O3CPU

◆ RenameMap

◆ RenameStruct

◆ TimeStruct

Member Enumeration Documentation

◆ StageStatus

◆ Status

Constructor & Destructor Documentation

◆ DefaultIEW()

Member Function Documentation

◆ activateStage()

◆ activityThisCycle()

◆ block()

◆ blockMemInst()

◆ cacheUnblocked()

◆ checkMisprediction()

◆ checkSignalsAndUpdate()

◆ checkStall()

◆ clearStates()

◆ deactivateStage()

◆ dispatch()

◆ dispatchInsts()

◆ drainSanityCheck()

◆ emptyRenameInsts()

◆ executeInsts()

◆ hasStoresToWB() [1/2]

◆ hasStoresToWB() [2/2]

◆ instToCommit()

◆ isDrained()

◆ name()

◆ printAvailableInsts()

◆ regProbePoints()

◆ regStats()

◆ replayMemInst()

◆ rescheduleMemInst()

◆ resetEntries()

◆ setActiveThreads()

◆ setIEWQueue()

◆ setLastRetiredHtmUid()

◆ setRenameQueue()

◆ setScoreboard()

◆ setTimeBuffer()

◆ skidCount()

◆ skidInsert()

◆ skidsEmpty()

◆ sortInsts()

◆ squash()

◆ squashDueToBranch()

◆ squashDueToMemOrder()

◆ startupStage()

◆ takeOverFrom()

◆ tick()

◆ unblock()

◆ updateExeInstStats()

◆ updateStatus()

◆ validInstsFromRename()

◆ wakeCPU()

◆ wakeDependents()

◆ writebackInsts()

Member Data Documentation

◆ _status

◆ activeThreads

◆ branchMispredicts

◆ commitToIEWDelay

◆ consumerInst

template<class Impl>
class DefaultIEW< Impl >