gem5
v20.1.0.0
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#include <fetch_unit.hh>
Classes | |
class | FetchBufDesc |
fetch buffer descriptor. More... | |
Public Member Functions | |
FetchUnit (const ComputeUnitParams *p, ComputeUnit &cu) | |
~FetchUnit () | |
void | init () |
void | exec () |
void | bindWaveList (std::vector< Wavefront * > *list) |
void | initiateFetch (Wavefront *wavefront) |
void | fetch (PacketPtr pkt, Wavefront *wavefront) |
void | processFetchReturn (PacketPtr pkt) |
void | flushBuf (int wfSlotId) |
Static Public Attributes | |
static uint32_t | globalFetchUnitID |
Private Attributes | |
bool | timingSim |
ComputeUnit & | computeUnit |
TheGpuISA::Decoder | decoder |
Scheduler | fetchScheduler |
std::vector< Wavefront * > | fetchQueue |
std::vector< std::pair< Wavefront *, bool > > | fetchStatusQueue |
std::vector< Wavefront * > * | waveList |
std::vector< FetchBufDesc > | fetchBuf |
int | fetchDepth |
number of cache lines we can fetch and buffer. More... | |
Definition at line 49 of file fetch_unit.hh.
FetchUnit::FetchUnit | ( | const ComputeUnitParams * | p, |
ComputeUnit & | cu | ||
) |
Definition at line 48 of file fetch_unit.cc.
FetchUnit::~FetchUnit | ( | ) |
Definition at line 54 of file fetch_unit.cc.
References fetchQueue, and fetchStatusQueue.
void FetchUnit::bindWaveList | ( | std::vector< Wavefront * > * | list | ) |
Definition at line 311 of file fetch_unit.cc.
References waveList.
void FetchUnit::exec | ( | ) |
now we check if any of the fetch buffers have buffered instruction data that can be decoded and sent to its wavefront's instruction buffer. then we check if any of the fetch buffer entries can be released. we only check if we can release a buffer
Definition at line 80 of file fetch_unit.cc.
References Scheduler::chooseWave(), computeUnit, fetchBuf, fetchQueue, fetchScheduler, fetchStatusQueue, Wavefront::getStatus(), initiateFetch(), ArmISA::j, Shader::n_wf, Wavefront::pendingFetch, Wavefront::S_RUNNING, Wavefront::S_WAITCNT, ComputeUnit::shader, Wavefront::stopFetch(), and Wavefront::wfSlotId.
this is necessary because the GPU TLB receives packets instead of requests. when the translation is complete, all relevent fields in the request will be populated, but not in the packet. here we create the new packet so we can set the size, addr, and proper flags.
if we have not reserved an entry in the fetch buffer, stop fetching. this can happen due to a branch instruction flushing the fetch buffer while an ITLB or I-cache request is still pending, in the same cycle another instruction is trying to fetch.
we should have reserved an entry in the fetch buffer for this cache line. here we get the pointer to the entry used to buffer this request's line data.
Definition at line 217 of file fetch_unit.cc.
References Packet::cmd, computeUnit, ComputeUnit::cu_id, Packet::dataStatic(), DPRINTF, fetchBuf, processFetchReturn(), Packet::req, ComputeUnit::SQCPort::retries, Packet::senderState, RequestPort::sendFunctional(), RequestPort::sendTimingReq(), Wavefront::simdId, ComputeUnit::sqcPort, timingSim, and Wavefront::wfSlotId.
Referenced by initiateFetch().
void FetchUnit::flushBuf | ( | int | wfSlotId | ) |
Definition at line 305 of file fetch_unit.cc.
References fetchBuf.
Referenced by Wavefront::discardFetch(), and Gcn3ISA::Inst_SOPP__S_ENDPGM::execute().
void FetchUnit::init | ( | ) |
Definition at line 61 of file fetch_unit.cc.
References Scheduler::bindList(), ComputeUnit::cacheLineSize(), computeUnit, decoder, fetchBuf, fetchDepth, fetchQueue, fetchScheduler, fetchStatusQueue, ArmISA::i, Shader::n_wf, ComputeUnit::shader, Shader::timingSim, timingSim, waveList, and Wavefront::wfSlotId.
void FetchUnit::initiateFetch | ( | Wavefront * | wavefront | ) |
calculate the virtual address to fetch from the SQC. the fetch buffer holds a configurable number of cache lines. we start fetching at the address of the cache line immediately following the buffered line(s).
Definition at line 132 of file fetch_unit.cc.
References ComputeUnit::cacheLineSize(), computeUnit, ComputeUnit::cu_id, DPRINTF, BaseTLB::Execute, fetch(), fetchBuf, ComputeUnit::getCacheLineBits(), Shader::gpuTc, Request::INST_FETCH, ComputeUnit::ITLBPort::isStalled(), makeLineAddress(), Wavefront::pc(), MemCmd::ReadReq, ComputeUnit::requestorId(), ComputeUnit::ITLBPort::retries, Packet::senderState, RequestPort::sendFunctional(), RequestPort::sendTimingReq(), ComputeUnit::shader, Wavefront::simdId, ComputeUnit::sqcTLBPort, ComputeUnit::ITLBPort::stallPort(), timingSim, MipsISA::vaddr, Wavefront::wfDynId, and Wavefront::wfSlotId.
Referenced by exec().
void FetchUnit::processFetchReturn | ( | PacketPtr | pkt | ) |
Definition at line 279 of file fetch_unit.cc.
References computeUnit, ComputeUnit::cu_id, DPRINTF, Wavefront::dropFetch, fetchBuf, Wavefront::instructionBuffer, Wavefront::pendingFetch, Packet::req, Packet::senderState, Wavefront::simdId, ComputeUnit::SQCPort::SenderState::wavefront, and Wavefront::wfSlotId.
Referenced by fetch().
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Definition at line 237 of file fetch_unit.hh.
Referenced by exec(), fetch(), init(), initiateFetch(), and processFetchReturn().
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Definition at line 238 of file fetch_unit.hh.
Referenced by init().
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Definition at line 258 of file fetch_unit.hh.
Referenced by exec(), fetch(), flushBuf(), init(), initiateFetch(), and processFetchReturn().
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number of cache lines we can fetch and buffer.
this includes the currently fetched line (i.e., the line that corresponds to the WF's current PC), as well as any lines that may be prefetched.
Definition at line 265 of file fetch_unit.hh.
Referenced by FetchUnit::FetchBufDesc::flushBuf(), init(), and FetchUnit::FetchBufDesc::reserveBuf().
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Definition at line 248 of file fetch_unit.hh.
Referenced by exec(), init(), and ~FetchUnit().
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Definition at line 244 of file fetch_unit.hh.
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Definition at line 253 of file fetch_unit.hh.
Referenced by exec(), init(), and ~FetchUnit().
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Definition at line 61 of file fetch_unit.hh.
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Definition at line 236 of file fetch_unit.hh.
Referenced by fetch(), init(), and initiateFetch().
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Definition at line 256 of file fetch_unit.hh.
Referenced by bindWaveList(), and init().