gem5
v20.1.0.0
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#include <op_encodings.hh>
Public Member Functions | |
Inst_SMEM (InFmt_SMEM *, const std::string &opcode) | |
~Inst_SMEM () | |
int | instSize () const override |
void | generateDisassembly () override |
bool | isScalarRegister (int opIdx) override |
bool | isVectorRegister (int opIdx) override |
int | getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override |
Public Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
GCN3GPUStaticInst (const std::string &opcode) | |
~GCN3GPUStaticInst () | |
bool | isFlatScratchRegister (int opIdx) override |
bool | isExecMaskRegister (int opIdx) override |
bool | isSrcOperand (int opIdx) override |
bool | isDstOperand (int opIdx) override |
int | getOperandSize (int opIdx) override |
int | coalescerTokenCount () const override |
Return the number of tokens needed by the coalescer. More... | |
ScalarRegU32 | srcLiteral () const override |
Public Member Functions inherited from GPUStaticInst | |
GPUStaticInst (const std::string &opcode) | |
virtual | ~GPUStaticInst () |
void | instAddr (int inst_addr) |
int | instAddr () const |
int | nextInstAddr () const |
void | instNum (int num) |
int | instNum () |
void | ipdInstNum (int num) |
int | ipdInstNum () const |
virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
const std::string & | disassemble () |
virtual int | getNumOperands ()=0 |
virtual int | numDstRegOperands ()=0 |
virtual int | numSrcRegOperands ()=0 |
int | numDstVecOperands () |
int | numSrcVecOperands () |
int | numDstVecDWORDs () |
int | numSrcVecDWORDs () |
int | numOpdDWORDs (int operandIdx) |
bool | isALU () const |
bool | isBranch () const |
bool | isCondBranch () const |
bool | isNop () const |
bool | isReturn () const |
bool | isEndOfKernel () const |
bool | isKernelLaunch () const |
bool | isSDWAInst () const |
bool | isDPPInst () const |
bool | isUnconditionalJump () const |
bool | isSpecialOp () const |
bool | isWaitcnt () const |
bool | isBarrier () const |
bool | isMemSync () const |
bool | isMemRef () const |
bool | isFlat () const |
bool | isLoad () const |
bool | isStore () const |
bool | isAtomic () const |
bool | isAtomicNoRet () const |
bool | isAtomicRet () const |
bool | isScalar () const |
bool | readsSCC () const |
bool | writesSCC () const |
bool | readsVCC () const |
bool | writesVCC () const |
bool | readsEXEC () const |
bool | writesEXEC () const |
bool | readsMode () const |
bool | writesMode () const |
bool | ignoreExec () const |
bool | isAtomicAnd () const |
bool | isAtomicOr () const |
bool | isAtomicXor () const |
bool | isAtomicCAS () const |
bool | isAtomicExch () const |
bool | isAtomicAdd () const |
bool | isAtomicSub () const |
bool | isAtomicInc () const |
bool | isAtomicDec () const |
bool | isAtomicMax () const |
bool | isAtomicMin () const |
bool | isArgLoad () const |
bool | isGlobalMem () const |
bool | isLocalMem () const |
bool | isArgSeg () const |
bool | isGlobalSeg () const |
bool | isGroupSeg () const |
bool | isKernArgSeg () const |
bool | isPrivateSeg () const |
bool | isReadOnlySeg () const |
bool | isSpillSeg () const |
bool | isGloballyCoherent () const |
Coherence domain of a memory instruction. More... | |
bool | isSystemCoherent () const |
bool | isF16 () const |
bool | isF32 () const |
bool | isF64 () const |
bool | isFMA () const |
bool | isMAC () const |
bool | isMAD () const |
virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
virtual uint32_t | getTargetPc () |
void | setFlag (Flags flag) |
const std::string & | opcode () const |
Protected Member Functions | |
template<int N> | |
void | initMemRead (GPUDynInstPtr gpuDynInst) |
initiate a memory read access for N dwords More... | |
template<int N> | |
void | initMemWrite (GPUDynInstPtr gpuDynInst) |
initiate a memory write access for N dwords More... | |
void | calcAddr (GPUDynInstPtr gpu_dyn_inst, ConstScalarOperandU64 &addr, ScalarRegU32 offset) |
For normal s_load_dword/s_store_dword instruction addresses. More... | |
void | calcAddr (GPUDynInstPtr gpu_dyn_inst, ConstScalarOperandU128 &s_rsrc_desc, ScalarRegU32 offset) |
For s_buffer_load_dword/s_buffer_store_dword instruction addresses. More... | |
Protected Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
void | panicUnimplemented () const |
Protected Attributes | |
InFmt_SMEM | instData |
InFmt_SMEM_1 | extData |
Protected Attributes inherited from Gcn3ISA::GCN3GPUStaticInst | |
ScalarRegU32 | _srcLiteral |
if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More... | |
Protected Attributes inherited from GPUStaticInst | |
const std::string | _opcode |
std::string | disassembly |
int | _instNum |
int | _instAddr |
int | srcVecOperands |
int | dstVecOperands |
int | srcVecDWORDs |
int | dstVecDWORDs |
int | _ipdInstNum |
Identifier of the immediate post-dominator instruction. More... | |
std::bitset< Num_Flags > | _flags |
Additional Inherited Members | |
Public Attributes inherited from GPUStaticInst | |
Enums::StorageClassType | executed_as |
Static Public Attributes inherited from GPUStaticInst | |
static uint64_t | dynamic_id_count |
Definition at line 187 of file op_encodings.hh.
Gcn3ISA::Inst_SMEM::Inst_SMEM | ( | InFmt_SMEM * | iFmt, |
const std::string & | opcode | ||
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Definition at line 600 of file op_encodings.cc.
References Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, extData, Gcn3ISA::InFmt_SMEM::GLC, instData, and GPUStaticInst::setFlag().
Gcn3ISA::Inst_SMEM::~Inst_SMEM | ( | ) |
Definition at line 616 of file op_encodings.cc.
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inlineprotected |
For s_buffer_load_dword/s_buffer_store_dword instruction addresses.
The s_buffer instructions use the same buffer resource descriptor as the MUBUF instructions.
The address is clamped if: Stride is zero: clamp if offset >= num_records Stride is non-zero: clamp if offset > (stride * num_records)
Definition at line 240 of file op_encodings.hh.
References ArmISA::offset, Gcn3ISA::ScalarOperand< DataType, Const, NumDwords >::rawDataPtr(), and MipsISA::vaddr.
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inlineprotected |
For normal s_load_dword/s_store_dword instruction addresses.
Definition at line 227 of file op_encodings.hh.
References addr, ArmISA::offset, and MipsISA::vaddr.
Referenced by Gcn3ISA::Inst_SMEM__S_LOAD_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX4::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX8::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX16::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX4::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX8::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX16::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORDX2::execute(), and Gcn3ISA::Inst_SMEM__S_STORE_DWORDX4::execute().
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 627 of file op_encodings.cc.
References GPUStaticInst::_opcode, GPUStaticInst::disassembly, extData, GPUStaticInst::getNumOperands(), Gcn3ISA::GCN3GPUStaticInst::getOperandSize(), Gcn3ISA::InFmt_SMEM::IMM, instData, GPUStaticInst::numDstRegOperands(), Gcn3ISA::InFmt_SMEM_1::OFFSET, Gcn3ISA::InFmt_SMEM::SBASE, and Gcn3ISA::InFmt_SMEM::SDATA.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 696 of file op_encodings.cc.
References extData, fatal, GPUStaticInst::getNumOperands(), Gcn3ISA::InFmt_SMEM::IMM, instData, Gcn3ISA::InFmt_SMEM_1::OFFSET, Gcn3ISA::opSelectorToRegIdx(), Gcn3ISA::InFmt_SMEM::SBASE, and Gcn3ISA::InFmt_SMEM::SDATA.
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inlineprotected |
initiate a memory read access for N dwords
Definition at line 206 of file op_encodings.hh.
References MemCmd::ReadReq.
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inlineprotected |
initiate a memory write access for N dwords
Definition at line 217 of file op_encodings.hh.
References MemCmd::WriteReq.
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overridevirtual |
Implements GPUStaticInst.
Definition at line 621 of file op_encodings.cc.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 662 of file op_encodings.cc.
References extData, fatal, GPUStaticInst::getNumOperands(), Gcn3ISA::InFmt_SMEM::IMM, instData, Gcn3ISA::isScalarReg(), Gcn3ISA::InFmt_SMEM_1::OFFSET, and Gcn3ISA::InFmt_SMEM::SDATA.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 686 of file op_encodings.cc.
References GPUStaticInst::getNumOperands().
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protected |
Definition at line 267 of file op_encodings.hh.
Referenced by Gcn3ISA::Inst_SMEM__S_LOAD_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX4::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX8::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX16::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX4::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX8::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX16::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORDX4::execute(), generateDisassembly(), getRegisterIndex(), Inst_SMEM(), and isScalarRegister().
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protected |
Definition at line 265 of file op_encodings.hh.
Referenced by Gcn3ISA::Inst_SMEM__S_LOAD_DWORD::completeAcc(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX2::completeAcc(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX4::completeAcc(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX8::completeAcc(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX16::completeAcc(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORD::completeAcc(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX2::completeAcc(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX4::completeAcc(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX8::completeAcc(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX16::completeAcc(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX4::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX8::execute(), Gcn3ISA::Inst_SMEM__S_LOAD_DWORDX16::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX4::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX8::execute(), Gcn3ISA::Inst_SMEM__S_BUFFER_LOAD_DWORDX16::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORD::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORDX2::execute(), Gcn3ISA::Inst_SMEM__S_STORE_DWORDX4::execute(), generateDisassembly(), getRegisterIndex(), Gcn3ISA::Inst_SMEM__S_STORE_DWORD::initiateAcc(), Gcn3ISA::Inst_SMEM__S_STORE_DWORDX2::initiateAcc(), Gcn3ISA::Inst_SMEM__S_STORE_DWORDX4::initiateAcc(), Inst_SMEM(), and isScalarRegister().