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41 #ifndef __CPU_O3_COMMIT_HH__
42 #define __CPU_O3_COMMIT_HH__
50 #include "enums/CommitPolicy.hh"
53 struct DerivO3CPUParams;
85 typedef typename Impl::O3CPU
O3CPU;
87 typedef typename Impl::CPUPol
CPUPol;
90 typedef typename CPUPol::ROB
ROB;
97 typedef typename CPUPol::Fetch
Fetch;
98 typedef typename CPUPol::IEW
IEW;
144 std::string
name()
const;
530 #endif // __CPU_O3_COMMIT_HH__
void tick()
Ticks the commit stage, which tries to commit instructions.
O3ThreadState< Impl > Thread
void squashFromTC(ThreadID tid)
Handles squashing due to an TC write.
CommitStatus _nextStatus
Next commit status, to be set at the end of the cycle.
CPUPol::IEWStruct IEWStruct
CPUPol::FetchStruct FetchStruct
Stats::Scalar branchMispredicts
Stat for the total number of branch mispredicts that caused a squash.
void generateTrapEvent(ThreadID tid, Fault inst_fault)
Generates an event to schedule a squash due to a trap.
void squashFromSquashAfter(ThreadID tid)
Handles a squash from a squashAfter() request.
ThreadID getCommittingThread()
Gets the thread to commit, based on the SMT policy.
Stats::Vector functionCalls
Total number of function calls.
bool changedROBNumEntries[Impl::MaxThreads]
Records if the number of ROB entries has changed this cycle.
void takeOverFrom()
Takes over from another CPU's thread.
ThreadID oldestReady()
Returns the thread ID to use based on an oldest instruction policy.
Stats::Vector membars
Total number of committed memory barriers.
Stats::Vector instsCommitted
Total number of instructions committed.
void resetHtmStartsStops(ThreadID)
Stats::Vector2d committedInstType
Committed instructions by instruction type (OpClass)
int16_t ThreadID
Thread index/ID type.
void squashAfter(ThreadID tid, const DynInstPtr &head_inst)
Handle squashing from instruction with SquashAfter set.
TimeBuffer< TimeStruct > * timeBuffer
Time buffer interface.
TimeBuffer< IEWStruct >::wire fromIEW
Wire to read information from IEW queue.
bool committedStores[Impl::MaxThreads]
Records if there were any stores committed this cycle.
ThreadStatus commitStatus[Impl::MaxThreads]
Per-thread status.
void drain()
Initializes the draining of commit.
TimeBuffer< IEWStruct > * iewQueue
IEW instruction queue interface.
InstSeqNum lastCommitedSeqNum[Impl::MaxThreads]
The sequence number of the last commited instruction.
std::list< ThreadID > priority_list
Priority List used for Commit Policy.
void squashAll(ThreadID tid)
Squashes all in flight instructions.
O3CPU * cpu
Pointer to O3CPU.
Impl::DynInstPtr DynInstPtr
bool trapSquash[Impl::MaxThreads]
Records if a thread has to squash this cycle due to a trap.
void clearStates(ThreadID tid)
Clear all thread-specific states.
Addr microPC(ThreadID tid)
Reads the micro PC of a specific thread.
Stats::Vector amos
Stat for the total number of committed atomics.
const unsigned renameWidth
Rename width, in instructions.
A vector of scalar stats.
bool changedROBEntries()
Returns if any of the threads have the number of ROB entries changed on this cycle.
std::vector< Thread * > thread
Vector of all of the threads.
TimeBuffer< FetchStruct > * fetchQueue
unsigned numRobs
Number of Reorder Buffers.
CommitStatus
Overall commit status.
TimeBuffer< RenameStruct >::wire fromRename
Wire to read information from rename queue.
IEW * iewStage
The pointer to the IEW stage.
DynInstPtr squashAfterInst[Impl::MaxThreads]
Instruction passed to squashAfter().
This is a simple scalar statistic, like a counter.
int htmStops[Impl::MaxThreads]
void drainSanityCheck() const
Perform sanity checks after a drain.
bool trapInFlight[Impl::MaxThreads]
Records if there is a trap currently in flight.
TimeBuffer< TimeStruct >::wire toIEW
Wire to write information heading to previous stages.
bool wroteToTimeBuffer
Records that commit has written to the time buffer this cycle.
Stats::Vector vector
Total number of vector instructions.
void setROB(ROB *rob_ptr)
Sets pointer to the ROB.
const ThreadID numThreads
Number of Active Threads.
Stats::Vector branches
Total number of committed branches.
TimeBuffer< RenameStruct > * renameQueue
Rename instruction queue interface, for ROB.
std::shared_ptr< FaultBase > Fault
bool canHandleInterrupts
True if last committed microop can be followed by an interrupt.
Stats::Vector opsCommitted
Total number of ops (including micro ops) committed.
const Cycles renameToROBDelay
Rename to ROB delay.
void markCompletedInsts()
Marks completed instructions using information sent from IEW.
DefaultCommit handles single threaded and SMT commit.
const unsigned commitWidth
Commit width, in instructions.
const Cycles iewToCommitDelay
IEW to Commit delay.
bool drainPending
Is a drain pending? Commit is looking for an instruction boundary while there are no pending interrup...
CommitPolicy commitPolicy
Commit policy used in SMT mode.
void setActiveThreads(std::list< ThreadID > *at_ptr)
Sets pointer to list of active threads.
void handleInterrupt()
Handles processing an interrupt.
Class that has various thread state, such as the status, the current instruction being processed,...
void processTrapEvent(ThreadID tid)
Mark the thread as processing a trap.
void regProbePoints()
Registers probes.
void setTimeBuffer(TimeBuffer< TimeStruct > *tb_ptr)
Sets the main time buffer pointer, used for backwards communication.
void updateStatus()
Updates the overall status of commit with the nextStatus, and tell the CPU if commit is active/inacti...
bool tcSquash[Impl::MaxThreads]
Records if a thread has to squash this cycle due to an XC write.
Stats::Scalar commitSquashedInsts
Stat for the total number of squashed instructions discarded by commit.
CPUPol::RenameStruct RenameStruct
TheISA::PCState pc[Impl::MaxThreads]
The commit PC state of each thread.
int htmStarts[Impl::MaxThreads]
Addr nextInstAddr(ThreadID tid)
Returns the next PC of a specific thread.
void setRenameQueue(TimeBuffer< RenameStruct > *rq_ptr)
Sets the pointer to the queue coming from rename.
std::string name() const
Returns the name of the DefaultCommit.
bool drainImminent
Is a drain imminent? Commit has found an instruction boundary while no interrupts were present or in ...
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
A simple distribution stat.
CommitStatus _status
Overall commit status.
TimeBuffer< FetchStruct >::wire fromFetch
void generateTCEvent(ThreadID tid)
Records that commit needs to initiate a squash due to an external state update through the TC.
void startupStage()
Initializes stage by sending back the number of free entries.
ThreadID roundRobin()
Returns the thread ID to use based on a round robin policy.
bool commitHead(const DynInstPtr &head_inst, unsigned inst_num)
Tries to commit the head ROB instruction passed in.
CommitStats(O3CPU *cpu, DefaultCommit *commit)
ProbePointArg< DynInstPtr > * ppCommitStall
Stats::Scalar commitEligibleSamples
Number of cycles where the commit bandwidth limit is reached.
ProbePointArg< DynInstPtr > * ppCommit
Probe Points.
bool isDrained() const
Has the stage drained?
CPUPol::RenameMap RenameMap
void drainResume()
Resumes execution after draining.
Stats::Scalar commitNonSpecStalls
Stat for the total number of times commit has had to stall due to a non-speculative instruction reach...
void setIEWQueue(TimeBuffer< IEWStruct > *iq_ptr)
Sets the pointer to the queue coming from IEW.
void propagateInterrupt()
Get fetch redirecting so we can handle an interrupt.
const Cycles commitToIEWDelay
Commit to IEW delay.
const Cycles trapLatency
The latency to handle a trap.
const Cycles fetchToCommitDelay
TimeBuffer< TimeStruct >::wire robInfoFromIEW
Wire to read information from IEW (for ROB).
A 2-Dimensional vecto of scalar stats.
void setFetchQueue(TimeBuffer< FetchStruct > *fq_ptr)
void setRenameMap(RenameMap rm_ptr[Impl::MaxThreads])
Sets pointer to the commited state rename map.
void squashFromTrap(ThreadID tid)
Handles squashing due to a trap.
GenericISA::DelaySlotPCState< MachInst > PCState
ThreadStatus
Individual thread status.
Cycles is a wrapper class for representing cycle counts, i.e.
RenameMap * renameMap[Impl::MaxThreads]
Rename map interface.
Stats::Vector loads
Stat for the total number of committed loads.
Addr instAddr(ThreadID tid)
Returns the PC of a specific thread.
std::list< ThreadID > * activeThreads
Pointer to the list of active threads.
void commitInsts()
Commits as many instructions as possible.
void pcState(const TheISA::PCState &val, ThreadID tid)
Sets the PC of a specific thread.
Stats::Vector memRefs
Stat for the total number of committed memory references.
Stats::Vector floating
Total number of floating point instructions.
void deactivateThread(ThreadID tid)
Deschedules a thread from scheduling.
void commit()
Handles any squashes that are sent from IEW, and adds instructions to the ROB and tries to commit ins...
void setIEWStage(IEW *iew_stage)
Sets the pointer to the IEW stage.
InstSeqNum youngestSeqNum[Impl::MaxThreads]
The sequence number of the youngest valid instruction in the ROB.
bool checkEmptyROB[Impl::MaxThreads]
Records if commit should check if the ROB is truly empty (see commit_impl.hh).
Fault interrupt
The interrupt fault.
TheISA::PCState pcState(ThreadID tid)
Reads the PC of a specific thread.
void updateComInstStats(const DynInstPtr &inst)
Updates commit stats based on this instruction.
ProbePointArg< DynInstPtr > * ppSquash
To probe when an instruction is squashed.
Stats::Vector integer
Total number of integer instructions.
void setThreads(std::vector< Thread * > &threads)
Sets the list of threads.
bool executingHtmTransaction(ThreadID) const
Is the CPU currently processing a HTM transaction?
void getInsts()
Gets instructions from rename and inserts them into the ROB.
bool avoidQuiesceLiveLock
Have we had an interrupt pending and then seen it de-asserted because of a masking change?...
Stats::Distribution numCommittedDist
Distribution of the number of committed instructions each cycle.
DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params)
Construct a DefaultCommit with the given parameters.
CPUPol::TimeStruct TimeStruct
DefaultCommit::CommitStats stats
size_t numROBFreeEntries(ThreadID tid)
Returns the number of free ROB entries for a specific thread.
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