gem5
v20.1.0.0
arch
x86
regs
float.hh
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/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_X86_FLOATREGS_HH__
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#define __ARCH_X86_FLOATREGS_HH__
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#include "
arch/x86/x86_traits.hh
"
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#include "
base/bitunion.hh
"
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namespace
X86ISA
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{
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enum
FloatRegIndex
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{
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// MMX/X87 registers
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FLOATREG_MMX_BASE
,
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FLOATREG_FPR_BASE
=
FLOATREG_MMX_BASE
,
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FLOATREG_MMX0
=
FLOATREG_MMX_BASE
,
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FLOATREG_MMX1
,
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FLOATREG_MMX2
,
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FLOATREG_MMX3
,
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FLOATREG_MMX4
,
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FLOATREG_MMX5
,
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FLOATREG_MMX6
,
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FLOATREG_MMX7
,
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FLOATREG_FPR0
=
FLOATREG_FPR_BASE
,
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FLOATREG_FPR1
,
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FLOATREG_FPR2
,
63
FLOATREG_FPR3
,
64
FLOATREG_FPR4
,
65
FLOATREG_FPR5
,
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FLOATREG_FPR6
,
67
FLOATREG_FPR7
,
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FLOATREG_XMM_BASE
=
FLOATREG_MMX_BASE
+
NumMMXRegs
,
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FLOATREG_XMM0_LOW
=
FLOATREG_XMM_BASE
,
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FLOATREG_XMM0_HIGH
,
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FLOATREG_XMM1_LOW
,
73
FLOATREG_XMM1_HIGH
,
74
FLOATREG_XMM2_LOW
,
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FLOATREG_XMM2_HIGH
,
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FLOATREG_XMM3_LOW
,
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FLOATREG_XMM3_HIGH
,
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FLOATREG_XMM4_LOW
,
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FLOATREG_XMM4_HIGH
,
80
FLOATREG_XMM5_LOW
,
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FLOATREG_XMM5_HIGH
,
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FLOATREG_XMM6_LOW
,
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FLOATREG_XMM6_HIGH
,
84
FLOATREG_XMM7_LOW
,
85
FLOATREG_XMM7_HIGH
,
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FLOATREG_XMM8_LOW
,
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FLOATREG_XMM8_HIGH
,
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FLOATREG_XMM9_LOW
,
89
FLOATREG_XMM9_HIGH
,
90
FLOATREG_XMM10_LOW
,
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FLOATREG_XMM10_HIGH
,
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FLOATREG_XMM11_LOW
,
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FLOATREG_XMM11_HIGH
,
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FLOATREG_XMM12_LOW
,
95
FLOATREG_XMM12_HIGH
,
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FLOATREG_XMM13_LOW
,
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FLOATREG_XMM13_HIGH
,
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FLOATREG_XMM14_LOW
,
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FLOATREG_XMM14_HIGH
,
100
FLOATREG_XMM15_LOW
,
101
FLOATREG_XMM15_HIGH
,
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FLOATREG_MICROFP_BASE
=
FLOATREG_XMM_BASE
+ 2 *
NumXMMRegs
,
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FLOATREG_MICROFP0
=
FLOATREG_MICROFP_BASE
,
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FLOATREG_MICROFP1
,
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FLOATREG_MICROFP2
,
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FLOATREG_MICROFP3
,
108
FLOATREG_MICROFP4
,
109
FLOATREG_MICROFP5
,
110
FLOATREG_MICROFP6
,
111
FLOATREG_MICROFP7
,
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NUM_FLOATREGS
=
FLOATREG_MICROFP_BASE
+
NumMicroFpRegs
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};
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static
inline
FloatRegIndex
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FLOATREG_MMX
(
int
index
)
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{
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return
(
FloatRegIndex
)(
FLOATREG_MMX_BASE
+
index
);
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}
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static
inline
FloatRegIndex
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FLOATREG_FPR
(
int
index
)
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{
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return
(
FloatRegIndex
)(
FLOATREG_FPR_BASE
+
index
);
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}
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static
inline
FloatRegIndex
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FLOATREG_XMM_LOW
(
int
index
)
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{
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return
(
FloatRegIndex
)(
FLOATREG_XMM_BASE
+ 2 *
index
);
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}
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static
inline
FloatRegIndex
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FLOATREG_XMM_HIGH
(
int
index
)
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{
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return
(
FloatRegIndex
)(
FLOATREG_XMM_BASE
+ 2 *
index
+ 1);
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}
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static
inline
FloatRegIndex
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FLOATREG_MICROFP
(
int
index
)
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{
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return
(
FloatRegIndex
)(
FLOATREG_MICROFP_BASE
+
index
);
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}
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static
inline
FloatRegIndex
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FLOATREG_STACK
(
int
index
,
int
top
)
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{
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return
FLOATREG_FPR
((
top
+
index
+ 8) % 8);
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}
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}
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#endif // __ARCH_X86_FLOATREGS_HH__
X86ISA::FLOATREG_XMM14_LOW
@ FLOATREG_XMM14_LOW
Definition:
float.hh:98
x86_traits.hh
X86ISA::FLOATREG_MMX3
@ FLOATREG_MMX3
Definition:
float.hh:54
X86ISA::FLOATREG_XMM13_LOW
@ FLOATREG_XMM13_LOW
Definition:
float.hh:96
X86ISA::FLOATREG_MMX1
@ FLOATREG_MMX1
Definition:
float.hh:52
X86ISA::FLOATREG_MICROFP2
@ FLOATREG_MICROFP2
Definition:
float.hh:106
X86ISA::FLOATREG_XMM5_LOW
@ FLOATREG_XMM5_LOW
Definition:
float.hh:80
X86ISA::FLOATREG_FPR4
@ FLOATREG_FPR4
Definition:
float.hh:64
X86ISA::FLOATREG_MICROFP4
@ FLOATREG_MICROFP4
Definition:
float.hh:108
X86ISA::FLOATREG_XMM8_LOW
@ FLOATREG_XMM8_LOW
Definition:
float.hh:86
X86ISA::FLOATREG_XMM12_HIGH
@ FLOATREG_XMM12_HIGH
Definition:
float.hh:95
X86ISA::FLOATREG_MMX6
@ FLOATREG_MMX6
Definition:
float.hh:57
X86ISA::FLOATREG_FPR3
@ FLOATREG_FPR3
Definition:
float.hh:63
X86ISA::FLOATREG_FPR2
@ FLOATREG_FPR2
Definition:
float.hh:62
X86ISA::FLOATREG_MICROFP0
@ FLOATREG_MICROFP0
Definition:
float.hh:104
X86ISA::FLOATREG_MMX7
@ FLOATREG_MMX7
Definition:
float.hh:58
X86ISA::FLOATREG_XMM7_HIGH
@ FLOATREG_XMM7_HIGH
Definition:
float.hh:85
top
Definition:
test.h:61
X86ISA::FLOATREG_XMM5_HIGH
@ FLOATREG_XMM5_HIGH
Definition:
float.hh:81
X86ISA::FLOATREG_XMM11_LOW
@ FLOATREG_XMM11_LOW
Definition:
float.hh:92
X86ISA::NumMicroFpRegs
const int NumMicroFpRegs
Definition:
x86_traits.hh:59
X86ISA::FLOATREG_MMX0
@ FLOATREG_MMX0
Definition:
float.hh:51
X86ISA::FLOATREG_FPR_BASE
@ FLOATREG_FPR_BASE
Definition:
float.hh:50
X86ISA::FLOATREG_XMM2_HIGH
@ FLOATREG_XMM2_HIGH
Definition:
float.hh:75
X86ISA::FLOATREG_MMX4
@ FLOATREG_MMX4
Definition:
float.hh:55
X86ISA::FLOATREG_XMM10_HIGH
@ FLOATREG_XMM10_HIGH
Definition:
float.hh:91
X86ISA::FLOATREG_XMM9_HIGH
@ FLOATREG_XMM9_HIGH
Definition:
float.hh:89
X86ISA::FLOATREG_XMM4_HIGH
@ FLOATREG_XMM4_HIGH
Definition:
float.hh:79
X86ISA::FLOATREG_XMM6_HIGH
@ FLOATREG_XMM6_HIGH
Definition:
float.hh:83
X86ISA::FLOATREG_XMM_BASE
@ FLOATREG_XMM_BASE
Definition:
float.hh:69
X86ISA::FLOATREG_XMM6_LOW
@ FLOATREG_XMM6_LOW
Definition:
float.hh:82
X86ISA::FLOATREG_XMM8_HIGH
@ FLOATREG_XMM8_HIGH
Definition:
float.hh:87
X86ISA::FLOATREG_XMM3_LOW
@ FLOATREG_XMM3_LOW
Definition:
float.hh:76
X86ISA::index
Bitfield< 5, 3 > index
Definition:
types.hh:93
X86ISA::FLOATREG_XMM2_LOW
@ FLOATREG_XMM2_LOW
Definition:
float.hh:74
X86ISA::FLOATREG_FPR
static FloatRegIndex FLOATREG_FPR(int index)
Definition:
float.hh:123
X86ISA::FLOATREG_XMM13_HIGH
@ FLOATREG_XMM13_HIGH
Definition:
float.hh:97
X86ISA::FLOATREG_XMM9_LOW
@ FLOATREG_XMM9_LOW
Definition:
float.hh:88
X86ISA::FLOATREG_XMM10_LOW
@ FLOATREG_XMM10_LOW
Definition:
float.hh:90
bitunion.hh
X86ISA::FLOATREG_FPR1
@ FLOATREG_FPR1
Definition:
float.hh:61
X86ISA::FLOATREG_FPR0
@ FLOATREG_FPR0
Definition:
float.hh:60
X86ISA::FLOATREG_MICROFP_BASE
@ FLOATREG_MICROFP_BASE
Definition:
float.hh:103
X86ISA::FLOATREG_XMM_HIGH
static FloatRegIndex FLOATREG_XMM_HIGH(int index)
Definition:
float.hh:135
X86ISA::FLOATREG_MICROFP6
@ FLOATREG_MICROFP6
Definition:
float.hh:110
X86ISA::FLOATREG_MMX_BASE
@ FLOATREG_MMX_BASE
Definition:
float.hh:49
X86ISA::FLOATREG_XMM1_HIGH
@ FLOATREG_XMM1_HIGH
Definition:
float.hh:73
X86ISA
This is exposed globally, independent of the ISA.
Definition:
acpi.hh:55
X86ISA::FLOATREG_XMM4_LOW
@ FLOATREG_XMM4_LOW
Definition:
float.hh:78
X86ISA::FLOATREG_XMM1_LOW
@ FLOATREG_XMM1_LOW
Definition:
float.hh:72
X86ISA::FLOATREG_XMM15_HIGH
@ FLOATREG_XMM15_HIGH
Definition:
float.hh:101
X86ISA::FLOATREG_XMM7_LOW
@ FLOATREG_XMM7_LOW
Definition:
float.hh:84
X86ISA::NumXMMRegs
const int NumXMMRegs
Definition:
x86_traits.hh:58
X86ISA::NUM_FLOATREGS
@ NUM_FLOATREGS
Definition:
float.hh:113
X86ISA::FLOATREG_XMM12_LOW
@ FLOATREG_XMM12_LOW
Definition:
float.hh:94
X86ISA::FLOATREG_XMM0_HIGH
@ FLOATREG_XMM0_HIGH
Definition:
float.hh:71
X86ISA::FLOATREG_XMM14_HIGH
@ FLOATREG_XMM14_HIGH
Definition:
float.hh:99
X86ISA::FLOATREG_MMX5
@ FLOATREG_MMX5
Definition:
float.hh:56
X86ISA::FLOATREG_MMX
static FloatRegIndex FLOATREG_MMX(int index)
Definition:
float.hh:117
X86ISA::FLOATREG_XMM_LOW
static FloatRegIndex FLOATREG_XMM_LOW(int index)
Definition:
float.hh:129
X86ISA::FLOATREG_FPR6
@ FLOATREG_FPR6
Definition:
float.hh:66
X86ISA::FLOATREG_MICROFP1
@ FLOATREG_MICROFP1
Definition:
float.hh:105
X86ISA::FLOATREG_STACK
static FloatRegIndex FLOATREG_STACK(int index, int top)
Definition:
float.hh:147
X86ISA::FloatRegIndex
FloatRegIndex
Definition:
float.hh:46
X86ISA::FLOATREG_MMX2
@ FLOATREG_MMX2
Definition:
float.hh:53
X86ISA::FLOATREG_XMM0_LOW
@ FLOATREG_XMM0_LOW
Definition:
float.hh:70
X86ISA::FLOATREG_FPR7
@ FLOATREG_FPR7
Definition:
float.hh:67
X86ISA::FLOATREG_XMM11_HIGH
@ FLOATREG_XMM11_HIGH
Definition:
float.hh:93
X86ISA::FLOATREG_MICROFP5
@ FLOATREG_MICROFP5
Definition:
float.hh:109
X86ISA::FLOATREG_FPR5
@ FLOATREG_FPR5
Definition:
float.hh:65
X86ISA::FLOATREG_XMM15_LOW
@ FLOATREG_XMM15_LOW
Definition:
float.hh:100
X86ISA::FLOATREG_XMM3_HIGH
@ FLOATREG_XMM3_HIGH
Definition:
float.hh:77
X86ISA::FLOATREG_MICROFP3
@ FLOATREG_MICROFP3
Definition:
float.hh:107
X86ISA::NumMMXRegs
const int NumMMXRegs
Definition:
x86_traits.hh:57
X86ISA::FLOATREG_MICROFP
static FloatRegIndex FLOATREG_MICROFP(int index)
Definition:
float.hh:141
X86ISA::FLOATREG_MICROFP7
@ FLOATREG_MICROFP7
Definition:
float.hh:111
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