gem5  v20.1.0.0
inst_queue.hh
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41 
42 #ifndef __CPU_O3_INST_QUEUE_HH__
43 #define __CPU_O3_INST_QUEUE_HH__
44 
45 #include <list>
46 #include <map>
47 #include <queue>
48 #include <vector>
49 
50 #include "base/statistics.hh"
51 #include "base/types.hh"
52 #include "cpu/o3/dep_graph.hh"
53 #include "cpu/inst_seq.hh"
54 #include "cpu/op_class.hh"
55 #include "cpu/timebuf.hh"
56 #include "enums/SMTQueuePolicy.hh"
57 #include "sim/eventq.hh"
58 
59 struct DerivO3CPUParams;
60 class FUPool;
61 class MemInterface;
62 
80 template <class Impl>
82 {
83  public:
84  //Typedefs from the Impl.
85  typedef typename Impl::O3CPU O3CPU;
86  typedef typename Impl::DynInstPtr DynInstPtr;
87 
88  typedef typename Impl::CPUPol::IEW IEW;
89  typedef typename Impl::CPUPol::MemDepUnit MemDepUnit;
90  typedef typename Impl::CPUPol::IssueStruct IssueStruct;
91  typedef typename Impl::CPUPol::TimeStruct TimeStruct;
92 
93  // Typedef of iterator through the list of instructions.
95 
97  class FUCompletion : public Event {
98  private:
101 
103  int fuIdx;
104 
107 
111  bool freeFU;
112 
113  public:
115  FUCompletion(const DynInstPtr &_inst, int fu_idx,
116  InstructionQueue<Impl> *iq_ptr);
117 
118  virtual void process();
119  virtual const char *description() const;
120  void setFreeFU() { freeFU = true; }
121  };
122 
124  InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params);
125 
128 
130  std::string name() const;
131 
133  void regStats();
134 
136  void resetState();
137 
140 
143 
146 
148  bool isDrained() const;
149 
151  void drainSanityCheck() const;
152 
154  void takeOverFrom();
155 
157  int entryAmount(ThreadID num_threads);
158 
160  void resetEntries();
161 
163  unsigned numFreeEntries();
164 
166  unsigned numFreeEntries(ThreadID tid);
167 
169  bool isFull();
170 
172  bool isFull(ThreadID tid);
173 
175  bool hasReadyInsts();
176 
178  void insert(const DynInstPtr &new_inst);
179 
181  void insertNonSpec(const DynInstPtr &new_inst);
182 
186  void insertBarrier(const DynInstPtr &barr_inst);
187 
192 
197 
202 
207  void recordProducer(const DynInstPtr &inst)
208  { addToProducers(inst); }
209 
211  void processFUCompletion(const DynInstPtr &inst, int fu_idx);
212 
217  void scheduleReadyInsts();
218 
220  void scheduleNonSpec(const InstSeqNum &inst);
221 
226  void commit(const InstSeqNum &inst, ThreadID tid = 0);
227 
229  int wakeDependents(const DynInstPtr &completed_inst);
230 
232  void addReadyMemInst(const DynInstPtr &ready_inst);
233 
238  void rescheduleMemInst(const DynInstPtr &resched_inst);
239 
241  void replayMemInst(const DynInstPtr &replay_inst);
242 
247  void deferMemInst(const DynInstPtr &deferred_inst);
248 
250  void blockMemInst(const DynInstPtr &blocked_inst);
251 
253  void cacheUnblocked();
254 
256  void violation(const DynInstPtr &store, const DynInstPtr &faulting_load);
257 
262  void squash(ThreadID tid);
263 
265  unsigned getCount(ThreadID tid) { return count[tid]; };
266 
268  void printInsts();
269 
270  private:
272  void doSquash(ThreadID tid);
273 
275  // Various pointers
277 
280 
283 
286 
290  MemDepUnit memDepUnit[Impl::MaxThreads];
291 
296 
299 
302 
305 
307  // Instruction lists, ready queues, and ordering
309 
311  std::list<DynInstPtr> instList[Impl::MaxThreads];
312 
315 
320 
323 
328 
336  struct pqCompare {
337  bool operator() (const DynInstPtr &lhs, const DynInstPtr &rhs) const
338  {
339  return lhs->seqNum > rhs->seqNum;
340  }
341  };
342 
343  typedef std::priority_queue<DynInstPtr, std::vector<DynInstPtr>, pqCompare>
345 
350 
358  std::map<InstSeqNum, DynInstPtr> nonSpecInsts;
359 
360  typedef typename std::map<InstSeqNum, DynInstPtr>::iterator NonSpecMapIt;
361 
363  struct ListOrderEntry {
364  OpClass queueType;
366  };
367 
376 
378 
381 
386 
388  void addToOrderList(OpClass op_class);
389 
394  void moveToYoungerInst(ListOrderIt age_order_it);
395 
397 
399  // Various parameters
401 
403  SMTQueuePolicy iqPolicy;
404 
407 
410 
412  unsigned count[Impl::MaxThreads];
413 
415  unsigned maxEntries[Impl::MaxThreads];
416 
418  unsigned freeEntries;
419 
421  unsigned numEntries;
422 
424  unsigned totalWidth;
425 
427  unsigned numPhysRegs;
428 
431 
436 
438  InstSeqNum squashedSeqNum[Impl::MaxThreads];
439 
447 
449  bool addToDependents(const DynInstPtr &new_inst);
450 
452  void addToProducers(const DynInstPtr &new_inst);
453 
455  void addIfReady(const DynInstPtr &inst);
456 
461  int countInsts();
462 
467  void dumpLists();
468 
472  void dumpInsts();
473 
478 
501  // Also include number of instructions rescheduled and replayed.
502 
506 // Stats::VectorDistribution queueResDist;
512 // Stats::VectorDistribution issueDelayDist;
513 
518 // Stats::Vector dist_unissued;
521 
524 
529  public:
539 
543 };
544 
545 #endif //__CPU_O3_INST_QUEUE_HH__
Num_OpClasses
static const OpClass Num_OpClasses
Definition: op_class.hh:105
InstructionQueue::nonSpecInsts
std::map< InstSeqNum, DynInstPtr > nonSpecInsts
List of non-speculative instructions that will be scheduled once the IQ gets a signal from commit.
Definition: inst_queue.hh:358
InstructionQueue::addIfReady
void addIfReady(const DynInstPtr &inst)
Moves an instruction to the ready queue if it is ready.
Definition: inst_queue_impl.hh:1437
InstructionQueue::ListOrderEntry::queueType
OpClass queueType
Definition: inst_queue.hh:364
InstructionQueue::ListOrderEntry::oldestInst
InstSeqNum oldestInst
Definition: inst_queue.hh:365
InstructionQueue::takeOverFrom
void takeOverFrom()
Takes over execution from another CPU's thread.
Definition: inst_queue_impl.hh:480
InstructionQueue::fuBusyRate
Stats::Formula fuBusyRate
Number of times the FU was busy per instruction issued.
Definition: inst_queue.hh:528
InstructionQueue::vecAluAccesses
Stats::Scalar vecAluAccesses
Definition: inst_queue.hh:542
InstructionQueue::iewStage
IEW * iewStage
Pointer to IEW stage.
Definition: inst_queue.hh:285
InstructionQueue::wakeDependents
int wakeDependents(const DynInstPtr &completed_inst)
Wakes all dependents of a completed instruction.
Definition: inst_queue_impl.hh:987
InstructionQueue::commit
void commit(const InstSeqNum &inst, ThreadID tid=0)
Commits all instructions up to and including the given sequence number, for a specific thread.
Definition: inst_queue_impl.hh:969
op_class.hh
InstructionQueue::FUCompletion::setFreeFU
void setFreeFU()
Definition: inst_queue.hh:120
InstructionQueue::readyInsts
ReadyInstQueue readyInsts[Num_OpClasses]
List of ready instructions, per op class.
Definition: inst_queue.hh:349
InstructionQueue::name
std::string name() const
Returns the name of the IQ.
Definition: inst_queue_impl.hh:170
InstructionQueue::iqBranchInstsIssued
Stats::Scalar iqBranchInstsIssued
Stat for number of branch instructions issued.
Definition: inst_queue.hh:485
InstructionQueue::fromCommit
TimeBuffer< TimeStruct >::wire fromCommit
Wire to read information from timebuffer.
Definition: inst_queue.hh:301
InstructionQueue::getDeferredMemInstToExecute
DynInstPtr getDeferredMemInstToExecute()
Gets a memory instruction that was referred due to a delayed DTB translation if it is now ready to ex...
Definition: inst_queue_impl.hh:1156
InstructionQueue::squash
void squash(ThreadID tid)
Squashes instructions for a thread.
Definition: inst_queue_impl.hh:1193
InstructionQueue::getBlockedMemInstToExecute
DynInstPtr getBlockedMemInstToExecute()
Gets a memory instruction that was blocked on the cache.
Definition: inst_queue_impl.hh:1171
InstructionQueue::count
unsigned count[Impl::MaxThreads]
Per Thread IQ count.
Definition: inst_queue.hh:412
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:227
InstructionQueue::iqSquashedInstsIssued
Stats::Scalar iqSquashedInstsIssued
Stat for number of squashed instructions that were ready to issue.
Definition: inst_queue.hh:491
InstructionQueue::timeBuffer
TimeBuffer< TimeStruct > * timeBuffer
The backwards time buffer.
Definition: inst_queue.hh:298
InstructionQueue::FUCompletion::process
virtual void process()
Definition: inst_queue_impl.hh:70
InstructionQueue::commitToIEWDelay
Cycles commitToIEWDelay
Delay between commit stage and the IQ.
Definition: inst_queue.hh:435
InstructionQueue::iqPolicy
SMTQueuePolicy iqPolicy
IQ sharing policy for SMT.
Definition: inst_queue.hh:403
InstructionQueue::ListOrderIt
std::list< ListOrderEntry >::iterator ListOrderIt
Definition: inst_queue.hh:377
InstructionQueue::resetEntries
void resetEntries()
Resets max entries for all threads.
Definition: inst_queue_impl.hh:499
InstructionQueue::vecInstQueueWrites
Stats::Scalar vecInstQueueWrites
Definition: inst_queue.hh:537
InstructionQueue::retryMemInsts
std::list< DynInstPtr > retryMemInsts
List of instructions that were cache blocked, but a retry has been seen since, so they can now be ret...
Definition: inst_queue.hh:327
InstructionQueue::resetState
void resetState()
Resets all instruction queue state.
Definition: inst_queue_impl.hh:394
InstructionQueue::entryAmount
int entryAmount(ThreadID num_threads)
Number of entries needed for given amount of threads.
Definition: inst_queue_impl.hh:487
InstructionQueue::deferMemInst
void deferMemInst(const DynInstPtr &deferred_inst)
Defers a memory instruction when its DTB translation incurs a hw page table walk.
Definition: inst_queue_impl.hh:1131
InstructionQueue::NonSpecMapIt
std::map< InstSeqNum, DynInstPtr >::iterator NonSpecMapIt
Definition: inst_queue.hh:360
InstructionQueue::drainSanityCheck
void drainSanityCheck() const
Perform sanity checks after a drain.
Definition: inst_queue_impl.hh:470
InstructionQueue::~InstructionQueue
~InstructionQueue()
Destructs the IQ.
Definition: inst_queue_impl.hh:159
InstructionQueue::iqIntInstsIssued
Stats::Scalar iqIntInstsIssued
Stat for number of integer instructions issued.
Definition: inst_queue.hh:481
InstructionQueue::statIssuedInstType
Stats::Vector2d statIssuedInstType
Stat for total number issued for each instruction type.
Definition: inst_queue.hh:520
std::vector< bool >
InstructionQueue::countInsts
int countInsts()
Debugging function to count how many entries are in the IQ.
Definition: inst_queue_impl.hh:1477
InstructionQueue::fuBusy
Stats::Vector fuBusy
Number of times the FU was busy.
Definition: inst_queue.hh:526
InstructionQueue::dependGraph
DependencyGraph< DynInstPtr > dependGraph
Definition: inst_queue.hh:396
InstructionQueue::ListIt
std::list< DynInstPtr >::iterator ListIt
Definition: inst_queue.hh:94
InstructionQueue::iqSquashedOperandsExamined
Stats::Scalar iqSquashedOperandsExamined
Stat for number of squashed instruction operands examined when squashing.
Definition: inst_queue.hh:497
InstructionQueue::maxEntries
unsigned maxEntries[Impl::MaxThreads]
Max IQ Entries Per Thread.
Definition: inst_queue.hh:415
InstructionQueue::FUCompletion::fuIdx
int fuIdx
Index of the FU used for executing.
Definition: inst_queue.hh:103
InstructionQueue::blockMemInst
void blockMemInst(const DynInstPtr &blocked_inst)
Defers a memory instruction when it is cache blocked.
Definition: inst_queue_impl.hh:1138
InstructionQueue::vecInstQueueWakeupAccesses
Stats::Scalar vecInstQueueWakeupAccesses
Definition: inst_queue.hh:538
InstructionQueue::moveToYoungerInst
void moveToYoungerInst(ListOrderIt age_order_it)
Called when the oldest instruction has been removed from a ready queue; this places that ready queue ...
Definition: inst_queue_impl.hh:723
InstructionQueue::fpInstQueueReads
Stats::Scalar fpInstQueueReads
Definition: inst_queue.hh:533
InstructionQueue::cacheUnblocked
void cacheUnblocked()
Notify instruction queue that a previous blockage has resolved.
Definition: inst_queue_impl.hh:1147
FUPool
Pool of FU's, specific to the new CPU model.
Definition: fu_pool.hh:69
Stats::Vector
A vector of scalar stats.
Definition: statistics.hh:2575
InstructionQueue::setIssueToExecuteQueue
void setIssueToExecuteQueue(TimeBuffer< IssueStruct > *i2eQueue)
Sets the timer buffer between issue and execute.
Definition: inst_queue_impl.hh:441
InstructionQueue::ReadyInstQueue
std::priority_queue< DynInstPtr, std::vector< DynInstPtr >, pqCompare > ReadyInstQueue
Definition: inst_queue.hh:344
InstructionQueue::printInsts
void printInsts()
Debug function to print all instructions.
InstructionQueue::numPhysRegs
unsigned numPhysRegs
The number of physical registers in the CPU.
Definition: inst_queue.hh:427
TimeBuffer< IssueStruct >
InstructionQueue::readyIt
ListOrderIt readyIt[Num_OpClasses]
Iterators of each ready queue.
Definition: inst_queue.hh:385
DependencyGraph
Array of linked list that maintains the dependencies between producing instructions and consuming ins...
Definition: dep_graph.hh:71
InstructionQueue::iqSquashedInstsExamined
Stats::Scalar iqSquashedInstsExamined
Stat for number of squashed instructions examined when squashing.
Definition: inst_queue.hh:493
InstructionQueue::intInstQueueReads
Stats::Scalar intInstQueueReads
Definition: inst_queue.hh:530
InstructionQueue::processFUCompletion
void processFUCompletion(const DynInstPtr &inst, int fu_idx)
Process FU completion event.
Definition: inst_queue_impl.hh:749
InstructionQueue::cpu
O3CPU * cpu
Pointer to the CPU.
Definition: inst_queue.hh:279
timebuf.hh
Stats::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:2533
InstructionQueue::fuPool
FUPool * fuPool
Function unit pool.
Definition: inst_queue.hh:304
InstructionQueue::deferredMemInsts
std::list< DynInstPtr > deferredMemInsts
List of instructions waiting for their DTB translation to complete (hw page table walk in progress).
Definition: inst_queue.hh:319
InstructionQueue::iqNonSpecInstsAdded
Stats::Scalar iqNonSpecInstsAdded
Stat for number of non-speculative instructions added.
Definition: inst_queue.hh:477
InstructionQueue::numIssuedDist
Stats::Distribution numIssuedDist
Distribution of number of instructions in the queue.
Definition: inst_queue.hh:508
InstructionQueue::totalWidth
unsigned totalWidth
The total number of instructions that can be issued in one cycle.
Definition: inst_queue.hh:424
InstructionQueue::issueRate
Stats::Formula issueRate
Number of instructions issued per cycle.
Definition: inst_queue.hh:523
InstructionQueue::statFuBusy
Stats::Vector statFuBusy
Distribution of the cycles it takes to issue an instruction.
Definition: inst_queue.hh:517
InstructionQueue::MemDepUnit
Impl::CPUPol::MemDepUnit MemDepUnit
Definition: inst_queue.hh:89
InstructionQueue::TimeStruct
Impl::CPUPol::TimeStruct TimeStruct
Definition: inst_queue.hh:91
InstructionQueue::ListOrderEntry
Entry for the list age ordering by op class.
Definition: inst_queue.hh:363
inst_seq.hh
Event
Definition: eventq.hh:246
InstructionQueue::memDepUnit
MemDepUnit memDepUnit[Impl::MaxThreads]
The memory dependence unit, which tracks/predicts memory dependences between instructions.
Definition: inst_queue.hh:290
InstructionQueue::insert
void insert(const DynInstPtr &new_inst)
Inserts a new instruction into the IQ.
Definition: inst_queue_impl.hh:577
InstructionQueue::regStats
void regStats()
Registers statistics.
Definition: inst_queue_impl.hh:177
InstructionQueue::addToProducers
void addToProducers(const DynInstPtr &new_inst)
Adds an instruction to the dependency graph, as a producer.
Definition: inst_queue_impl.hh:1401
InstructionQueue::activeThreads
std::list< ThreadID > * activeThreads
Pointer to list of active threads.
Definition: inst_queue.hh:409
InstructionQueue::isDrained
bool isDrained() const
Determine if we are drained.
Definition: inst_queue_impl.hh:457
InstructionQueue::iqFloatInstsIssued
Stats::Scalar iqFloatInstsIssued
Stat for number of floating point instructions issued.
Definition: inst_queue.hh:483
statistics.hh
InstructionQueue::getCount
unsigned getCount(ThreadID tid)
Returns the number of used entries for a thread.
Definition: inst_queue.hh:265
InstructionQueue::dumpLists
void dumpLists()
Debugging function to dump all the list sizes, as well as print out the list of nonspeculative instru...
Definition: inst_queue_impl.hh:1484
InstructionQueue::freeEntries
unsigned freeEntries
Number of free IQ entries left.
Definition: inst_queue.hh:418
InstructionQueue::numThreads
ThreadID numThreads
Number of Total Threads.
Definition: inst_queue.hh:406
InstructionQueue::vecInstQueueReads
Stats::Scalar vecInstQueueReads
Definition: inst_queue.hh:536
InstructionQueue::iqMiscInstsIssued
Stats::Scalar iqMiscInstsIssued
Stat for number of miscellaneous instructions issued.
Definition: inst_queue.hh:489
InstructionQueue::pqCompare
Struct for comparing entries to be added to the priority queue.
Definition: inst_queue.hh:336
InstructionQueue::wbOutstanding
int wbOutstanding
Number of instructions currently in flight to FUs.
Definition: inst_queue.hh:430
InstructionQueue::recordProducer
void recordProducer(const DynInstPtr &inst)
Records the instruction as the producer of a register without adding it to the rest of the IQ.
Definition: inst_queue.hh:207
InstructionQueue::InstructionQueue
InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
Constructs an IQ.
Definition: inst_queue_impl.hh:85
InstructionQueue::iqInstsAdded
Stats::Scalar iqInstsAdded
Stat for number of instructions added.
Definition: inst_queue.hh:475
InstructionQueue::fpInstQueueWakeupAccesses
Stats::Scalar fpInstQueueWakeupAccesses
Definition: inst_queue.hh:535
InstructionQueue::replayMemInst
void replayMemInst(const DynInstPtr &replay_inst)
Replays a memory instruction.
Definition: inst_queue_impl.hh:1124
InstructionQueue::dumpInsts
void dumpInsts()
Debugging function to dump out all instructions that are in the IQ.
Definition: inst_queue_impl.hh:1527
InstructionQueue::insertNonSpec
void insertNonSpec(const DynInstPtr &new_inst)
Inserts a new, non-speculative instruction into the IQ.
Definition: inst_queue_impl.hh:623
InstSeqNum
uint64_t InstSeqNum
Definition: inst_seq.hh:37
InstructionQueue::doSquash
void doSquash(ThreadID tid)
Does the actual squashing.
Definition: inst_queue_impl.hh:1210
InstructionQueue::instsToExecute
std::list< DynInstPtr > instsToExecute
List of instructions that are ready to be executed.
Definition: inst_queue.hh:314
InstructionQueue::fpAluAccesses
Stats::Scalar fpAluAccesses
Definition: inst_queue.hh:541
InstructionQueue::scheduleReadyInsts
void scheduleReadyInsts()
Schedules ready instructions, adding the ready ones (oldest first) to the queue to execute.
Definition: inst_queue_impl.hh:773
InstructionQueue::intAluAccesses
Stats::Scalar intAluAccesses
Definition: inst_queue.hh:540
Stats::Distribution
A simple distribution stat.
Definition: statistics.hh:2617
InstructionQueue::DynInstPtr
Impl::DynInstPtr DynInstPtr
Definition: inst_queue.hh:86
InstructionQueue::squashedSeqNum
InstSeqNum squashedSeqNum[Impl::MaxThreads]
The sequence number of the squashed instruction.
Definition: inst_queue.hh:438
InstructionQueue::scheduleNonSpec
void scheduleNonSpec(const InstSeqNum &inst)
Schedules a single specific non-speculative instruction.
Definition: inst_queue_impl.hh:941
InstructionQueue::violation
void violation(const DynInstPtr &store, const DynInstPtr &faulting_load)
Indicates an ordering violation between a store and a load.
Definition: inst_queue_impl.hh:1184
InstructionQueue::IEW
Impl::CPUPol::IEW IEW
Definition: inst_queue.hh:88
InstructionQueue::FUCompletion::FUCompletion
FUCompletion(const DynInstPtr &_inst, int fu_idx, InstructionQueue< Impl > *iq_ptr)
Construct a FU completion event.
Definition: inst_queue_impl.hh:61
InstructionQueue::iqInstsIssued
Stats::Scalar iqInstsIssued
Definition: inst_queue.hh:479
InstructionQueue::queueOnList
bool queueOnList[Num_OpClasses]
Tracks if each ready queue is on the age order list.
Definition: inst_queue.hh:380
InstructionQueue::FUCompletion::iqPtr
InstructionQueue< Impl > * iqPtr
Pointer back to the instruction queue.
Definition: inst_queue.hh:106
InstructionQueue::FUCompletion::freeFU
bool freeFU
Should the FU be added to the list to be freed upon completing this event.
Definition: inst_queue.hh:111
InstructionQueue::FUCompletion::description
virtual const char * description() const
Return a C string describing the event.
Definition: inst_queue_impl.hh:79
Stats::Vector2d
A 2-Dimensional vecto of scalar stats.
Definition: statistics.hh:2603
InstructionQueue::numEntries
unsigned numEntries
The number of entries in the instruction queue.
Definition: inst_queue.hh:421
InstructionQueue::pqCompare::operator()
bool operator()(const DynInstPtr &lhs, const DynInstPtr &rhs) const
Definition: inst_queue.hh:337
InstructionQueue::getInstToExecute
DynInstPtr getInstToExecute()
Returns the oldest scheduled instruction, and removes it from the list of instructions waiting to exe...
Definition: inst_queue_impl.hh:679
InstructionQueue::dcacheInterface
MemInterface * dcacheInterface
Cache interface.
Definition: inst_queue.hh:282
types.hh
InstructionQueue::iqMemInstsIssued
Stats::Scalar iqMemInstsIssued
Stat for number of memory instructions issued.
Definition: inst_queue.hh:487
InstructionQueue::FUCompletion::inst
DynInstPtr inst
Executing instruction.
Definition: inst_queue.hh:100
Stats::Formula
A formula for statistics that is calculated when printed.
Definition: statistics.hh:3037
InstructionQueue
A standard instruction queue class.
Definition: inst_queue.hh:81
InstructionQueue::setActiveThreads
void setActiveThreads(std::list< ThreadID > *at_ptr)
Sets active threads list.
Definition: inst_queue_impl.hh:434
InstructionQueue::addToOrderList
void addToOrderList(OpClass op_class)
Add an op class to the age order list.
Definition: inst_queue_impl.hh:696
InstructionQueue::insertBarrier
void insertBarrier(const DynInstPtr &barr_inst)
Inserts a memory or write barrier into the IQ to make sure loads and stores are ordered properly.
Definition: inst_queue_impl.hh:670
Cycles
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:83
InstructionQueue::fpInstQueueWrites
Stats::Scalar fpInstQueueWrites
Definition: inst_queue.hh:534
InstructionQueue::instList
std::list< DynInstPtr > instList[Impl::MaxThreads]
List of all the instructions in the IQ (some of which may be issued).
Definition: inst_queue.hh:311
InstructionQueue::regScoreboard
std::vector< bool > regScoreboard
A cache of the recently woken registers.
Definition: inst_queue.hh:446
InstructionQueue::blockedMemInsts
std::list< DynInstPtr > blockedMemInsts
List of instructions that have been cache blocked.
Definition: inst_queue.hh:322
InstructionQueue::O3CPU
Impl::O3CPU O3CPU
Definition: inst_queue.hh:85
InstructionQueue::addToDependents
bool addToDependents(const DynInstPtr &new_inst)
Adds an instruction to the dependency graph, as a consumer.
Definition: inst_queue_impl.hh:1353
InstructionQueue::numFreeEntries
unsigned numFreeEntries()
Returns total number of free entries.
Definition: inst_queue_impl.hh:522
MemDepUnit
Memory dependency unit class.
Definition: mem_dep_unit.hh:80
InstructionQueue::FUCompletion
FU completion event class.
Definition: inst_queue.hh:97
std::list
STL list class.
Definition: stl.hh:51
InstructionQueue::rescheduleMemInst
void rescheduleMemInst(const DynInstPtr &resched_inst)
Reschedules a memory instruction.
Definition: inst_queue_impl.hh:1110
InstructionQueue::setTimeBuffer
void setTimeBuffer(TimeBuffer< TimeStruct > *tb_ptr)
Sets the global time buffer.
Definition: inst_queue_impl.hh:448
InstructionQueue::IssueStruct
Impl::CPUPol::IssueStruct IssueStruct
Definition: inst_queue.hh:90
dep_graph.hh
InstructionQueue::isFull
bool isFull()
Returns whether or not the IQ is full.
Definition: inst_queue_impl.hh:538
InstructionQueue::intInstQueueWakeupAccesses
Stats::Scalar intInstQueueWakeupAccesses
Definition: inst_queue.hh:532
InstructionQueue::issueToExecuteQueue
TimeBuffer< IssueStruct > * issueToExecuteQueue
The queue to the execute stage.
Definition: inst_queue.hh:295
InstructionQueue::hasReadyInsts
bool hasReadyInsts()
Returns if there are any ready instructions in the IQ.
Definition: inst_queue_impl.hh:560
InstructionQueue::intInstQueueWrites
Stats::Scalar intInstQueueWrites
Definition: inst_queue.hh:531
InstructionQueue::iqSquashedNonSpecRemoved
Stats::Scalar iqSquashedNonSpecRemoved
Stat for number of non-speculative instructions removed due to a squash.
Definition: inst_queue.hh:500
InstructionQueue::addReadyMemInst
void addReadyMemInst(const DynInstPtr &ready_inst)
Adds a ready memory instruction to the ready list.
Definition: inst_queue_impl.hh:1087
InstructionQueue::listOrder
std::list< ListOrderEntry > listOrder
List that contains the age order of the oldest instruction of each ready queue.
Definition: inst_queue.hh:375
eventq.hh
MemInterface
General interface to memory device Includes functions and parameters shared across media types.
Definition: mem_interface.hh:70

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