gem5  v20.1.0.0
mem_dep_unit.hh
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40 
41 #ifndef __CPU_O3_MEM_DEP_UNIT_HH__
42 #define __CPU_O3_MEM_DEP_UNIT_HH__
43 
44 #include <list>
45 #include <memory>
46 #include <set>
47 #include <unordered_map>
48 #include <unordered_set>
49 
50 #include "base/statistics.hh"
51 #include "cpu/inst_seq.hh"
52 #include "debug/MemDepUnit.hh"
53 
54 struct SNHash {
55  size_t operator() (const InstSeqNum &seq_num) const {
56  unsigned a = (unsigned)seq_num;
57  unsigned hash = (((a >> 14) ^ ((a >> 2) & 0xffff))) & 0x7FFFFFFF;
58 
59  return hash;
60  }
61 };
62 
63 struct DerivO3CPUParams;
64 
65 template <class Impl>
66 class InstructionQueue;
67 
79 template <class MemDepPred, class Impl>
81 {
82  protected:
83  std::string _name;
84 
85  public:
86  typedef typename Impl::DynInstPtr DynInstPtr;
87  typedef typename Impl::DynInstConstPtr DynInstConstPtr;
88 
90  MemDepUnit();
91 
93  MemDepUnit(DerivO3CPUParams *params);
94 
96  ~MemDepUnit();
97 
99  std::string name() const { return _name; }
100 
102  void init(DerivO3CPUParams *params, ThreadID tid);
103 
105  void regStats();
106 
108  bool isDrained() const;
109 
111  void drainSanityCheck() const;
112 
114  void takeOverFrom();
115 
117  void setIQ(InstructionQueue<Impl> *iq_ptr);
118 
120  void insert(const DynInstPtr &inst);
121 
123  void insertNonSpec(const DynInstPtr &inst);
124 
126  void insertBarrier(const DynInstPtr &barr_inst);
127 
129  void regsReady(const DynInstPtr &inst);
130 
132  void nonSpecInstReady(const DynInstPtr &inst);
133 
135  void reschedule(const DynInstPtr &inst);
136 
140  void replay();
141 
143  void completeInst(const DynInstPtr &inst);
144 
148  void squash(const InstSeqNum &squashed_num, ThreadID tid);
149 
151  void violation(const DynInstPtr &store_inst,
152  const DynInstPtr &violating_load);
153 
155  void issue(const DynInstPtr &inst);
156 
158  void dumpLists();
159 
160  private:
161 
163  void completed(const DynInstPtr &inst);
164 
166  void wakeDependents(const DynInstPtr &inst);
167 
169 
170  class MemDepEntry;
171 
172  typedef std::shared_ptr<MemDepEntry> MemDepEntryPtr;
173 
178  class MemDepEntry {
179  public:
181  MemDepEntry(const DynInstPtr &new_inst)
182  : inst(new_inst), regsReady(false), memDeps(0),
183  completed(false), squashed(false)
184  {
185 #ifdef DEBUG
186  ++memdep_count;
187 
188  DPRINTF(MemDepUnit, "Memory dependency entry created. "
189  "memdep_count=%i %s\n", memdep_count, inst->pcState());
190 #endif
191  }
192 
195  {
196  for (int i = 0; i < dependInsts.size(); ++i) {
197  dependInsts[i] = NULL;
198  }
199 #ifdef DEBUG
200  --memdep_count;
201 
202  DPRINTF(MemDepUnit, "Memory dependency entry deleted. "
203  "memdep_count=%i %s\n", memdep_count, inst->pcState());
204 #endif
205  }
206 
208  std::string name() const { return "memdepentry"; }
209 
212 
215 
218 
220  bool regsReady;
222  int memDeps;
224  bool completed;
226  bool squashed;
227 
229 #ifdef DEBUG
230  static int memdep_count;
231  static int memdep_insert;
232  static int memdep_erase;
233 #endif
234  };
235 
237  inline MemDepEntryPtr &findInHash(const DynInstConstPtr& inst);
238 
240  inline void moveToReady(MemDepEntryPtr &ready_inst_entry);
241 
242  typedef std::unordered_map<InstSeqNum, MemDepEntryPtr, SNHash> MemDepHash;
243 
244  typedef typename MemDepHash::iterator MemDepHashIt;
245 
248 
250  std::list<DynInstPtr> instList[Impl::MaxThreads];
251 
254 
260  MemDepPred depPred;
261 
263  std::unordered_set<InstSeqNum> loadBarrierSNs;
264 
266  std::unordered_set<InstSeqNum> storeBarrierSNs;
267 
269  bool hasLoadBarrier() const { return !loadBarrierSNs.empty(); }
270 
272  bool hasStoreBarrier() const { return !storeBarrierSNs.empty(); }
273 
275  void insertBarrierSN(const DynInstPtr &barr_inst);
276 
279 
281  int id;
282 
291 };
292 
293 #endif // __CPU_O3_MEM_DEP_UNIT_HH__
MemDepUnit::MemDepEntry::regsReady
bool regsReady
If the registers are ready or not.
Definition: mem_dep_unit.hh:220
MemDepUnit::MemDepHashIt
MemDepHash::iterator MemDepHashIt
Definition: mem_dep_unit.hh:244
MemDepUnit::replay
void replay()
Replays all instructions that have been rescheduled by moving them to the ready list.
Definition: mem_dep_unit_impl.hh:396
MemDepUnit::DynInstConstPtr
Impl::DynInstConstPtr DynInstConstPtr
Definition: mem_dep_unit.hh:87
MemDepUnit::MemDepEntry::name
std::string name() const
Returns the name of the memory dependence entry.
Definition: mem_dep_unit.hh:208
MemDepUnit::takeOverFrom
void takeOverFrom()
Takes over from another CPU's thread.
Definition: mem_dep_unit_impl.hh:154
MemDepUnit::id
int id
The thread id of this memory dependence unit.
Definition: mem_dep_unit.hh:281
MemDepUnit::ListIt
std::list< DynInstPtr >::iterator ListIt
Definition: mem_dep_unit.hh:168
MemDepUnit::_name
std::string _name
Definition: mem_dep_unit.hh:83
MemDepUnit::nonSpecInstReady
void nonSpecInstReady(const DynInstPtr &inst)
Indicate that a non-speculative instruction is ready.
Definition: mem_dep_unit_impl.hh:376
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:227
MemDepUnit::MemDepHash
std::unordered_map< InstSeqNum, MemDepEntryPtr, SNHash > MemDepHash
Definition: mem_dep_unit.hh:242
MemDepUnit::wakeDependents
void wakeDependents(const DynInstPtr &inst)
Wakes any dependents of a memory instruction.
Definition: mem_dep_unit_impl.hh:464
MemDepUnit::isDrained
bool isDrained() const
Determine if we are drained.
Definition: mem_dep_unit_impl.hh:129
MemDepUnit::hasLoadBarrier
bool hasLoadBarrier() const
Is there an outstanding load barrier that loads must wait on.
Definition: mem_dep_unit.hh:269
MemDepUnit::issue
void issue(const DynInstPtr &inst)
Issues the given instruction.
Definition: mem_dep_unit_impl.hh:566
MemDepUnit::MemDepEntry::~MemDepEntry
~MemDepEntry()
Frees any pointers.
Definition: mem_dep_unit.hh:194
std::vector< MemDepEntryPtr >
MemDepUnit::MemDepUnit
MemDepUnit()
Empty constructor.
Definition: mem_dep_unit_impl.hh:53
MemDepUnit::memDepHash
MemDepHash memDepHash
A hash map of all memory dependence entries.
Definition: mem_dep_unit.hh:247
MemDepUnit::completeInst
void completeInst(const DynInstPtr &inst)
Notifies completion of an instruction.
Definition: mem_dep_unit_impl.hh:441
MemDepUnit::violation
void violation(const DynInstPtr &store_inst, const DynInstPtr &violating_load)
Indicates an ordering violation between a store and a younger load.
Definition: mem_dep_unit_impl.hh:554
MemDepUnit::iqPtr
InstructionQueue< Impl > * iqPtr
Pointer to the IQ.
Definition: mem_dep_unit.hh:278
MemDepUnit::conflictingLoads
Stats::Scalar conflictingLoads
Stat for number of conflicting loads that had to wait for a store.
Definition: mem_dep_unit.hh:288
Stats::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:2533
MemDepUnit::findInHash
MemDepEntryPtr & findInHash(const DynInstConstPtr &inst)
Finds the memory dependence entry in the hash map.
Definition: mem_dep_unit_impl.hh:576
MemDepUnit::MemDepEntry::MemDepEntry
MemDepEntry(const DynInstPtr &new_inst)
Constructs a memory dependence entry.
Definition: mem_dep_unit.hh:181
MemDepUnit::squash
void squash(const InstSeqNum &squashed_num, ThreadID tid)
Squashes all instructions up until a given sequence number for a specific thread.
Definition: mem_dep_unit_impl.hh:502
MemDepUnit::instsToReplay
std::list< DynInstPtr > instsToReplay
A list of all instructions that are going to be replayed.
Definition: mem_dep_unit.hh:253
MemDepUnit::dumpLists
void dumpLists()
Debugging function to dump the lists of instructions.
Definition: mem_dep_unit_impl.hh:600
MemDepUnit::insertNonSpec
void insertNonSpec(const DynInstPtr &inst)
Inserts a non-speculative memory instruction.
Definition: mem_dep_unit_impl.hh:308
ArmISA::a
Bitfield< 8 > a
Definition: miscregs_types.hh:62
inst_seq.hh
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
MemDepUnit::~MemDepUnit
~MemDepUnit()
Frees up any memory allocated.
Definition: mem_dep_unit_impl.hh:69
statistics.hh
MemDepUnit::insertedLoads
Stats::Scalar insertedLoads
Stat for number of inserted loads.
Definition: mem_dep_unit.hh:284
MemDepUnit::reschedule
void reschedule(const DynInstPtr &inst)
Reschedules an instruction to be re-executed.
Definition: mem_dep_unit_impl.hh:389
MemDepUnit::MemDepEntry::listIt
ListIt listIt
The iterator to the instruction's location inside the list.
Definition: mem_dep_unit.hh:214
MemDepUnit::moveToReady
void moveToReady(MemDepEntryPtr &ready_inst_entry)
Moves an entry to the ready list.
Definition: mem_dep_unit_impl.hh:587
MemDepUnit::MemDepEntry::inst
DynInstPtr inst
The instruction being tracked.
Definition: mem_dep_unit.hh:211
InstSeqNum
uint64_t InstSeqNum
Definition: inst_seq.hh:37
MemDepUnit::setIQ
void setIQ(InstructionQueue< Impl > *iq_ptr)
Sets the pointer to the IQ.
Definition: mem_dep_unit_impl.hh:164
MemDepUnit::MemDepEntry::memDeps
int memDeps
Number of memory dependencies that need to be satisfied.
Definition: mem_dep_unit.hh:222
MemDepUnit::instList
std::list< DynInstPtr > instList[Impl::MaxThreads]
A list of all instructions in the memory dependence unit.
Definition: mem_dep_unit.hh:250
MemDepUnit::insertBarrier
void insertBarrier(const DynInstPtr &barr_inst)
Inserts a barrier instruction.
Definition: mem_dep_unit_impl.hh:330
MemDepUnit::regsReady
void regsReady(const DynInstPtr &inst)
Indicate that an instruction has its registers ready.
Definition: mem_dep_unit_impl.hh:353
MemDepUnit::storeBarrierSNs
std::unordered_set< InstSeqNum > storeBarrierSNs
Sequence numbers of outstanding store barriers.
Definition: mem_dep_unit.hh:266
MemDepUnit::insert
void insert(const DynInstPtr &inst)
Inserts a memory instruction.
Definition: mem_dep_unit_impl.hh:197
MemDepUnit::insertedStores
Stats::Scalar insertedStores
Stat for number of inserted stores.
Definition: mem_dep_unit.hh:286
SNHash::operator()
size_t operator()(const InstSeqNum &seq_num) const
Definition: mem_dep_unit.hh:55
MemDepUnit::conflictingStores
Stats::Scalar conflictingStores
Stat for number of conflicting stores that had to wait for a store.
Definition: mem_dep_unit.hh:290
MemDepUnit::MemDepEntry::completed
bool completed
If the instruction is completed.
Definition: mem_dep_unit.hh:224
MemDepUnit::insertBarrierSN
void insertBarrierSN(const DynInstPtr &barr_inst)
Inserts the SN of a barrier inst.
Definition: mem_dep_unit_impl.hh:171
MemDepUnit::depPred
MemDepPred depPred
The memory dependence predictor.
Definition: mem_dep_unit.hh:260
InstructionQueue
A standard instruction queue class.
Definition: inst_queue.hh:81
MemDepUnit::name
std::string name() const
Returns the name of the memory dependence unit.
Definition: mem_dep_unit.hh:99
MemDepUnit::DynInstPtr
Impl::DynInstPtr DynInstPtr
Definition: mem_dep_unit.hh:86
SNHash
Definition: mem_dep_unit.hh:54
MemDepUnit::MemDepEntry::squashed
bool squashed
If the instruction is squashed.
Definition: mem_dep_unit.hh:226
MemDepUnit::MemDepEntryPtr
std::shared_ptr< MemDepEntry > MemDepEntryPtr
Definition: mem_dep_unit.hh:170
MemDepUnit::init
void init(DerivO3CPUParams *params, ThreadID tid)
Initializes the unit with parameters and a thread id.
Definition: mem_dep_unit_impl.hh:95
MemDepUnit::drainSanityCheck
void drainSanityCheck() const
Perform sanity checks after a drain.
Definition: mem_dep_unit_impl.hh:142
MemDepUnit
Memory dependency unit class.
Definition: mem_dep_unit.hh:80
std::list
STL list class.
Definition: stl.hh:51
MemDepUnit::regStats
void regStats()
Registers statistics.
Definition: mem_dep_unit_impl.hh:108
MemDepUnit::hasStoreBarrier
bool hasStoreBarrier() const
Is there an outstanding store barrier that loads must wait on.
Definition: mem_dep_unit.hh:272
MemDepUnit::completed
void completed(const DynInstPtr &inst)
Completes a memory instruction.
Definition: mem_dep_unit_impl.hh:417
MemDepUnit::MemDepEntry::dependInsts
std::vector< MemDepEntryPtr > dependInsts
A vector of any dependent instructions.
Definition: mem_dep_unit.hh:217
MemDepUnit::MemDepEntry
Memory dependence entries that track memory operations, marking when the instruction is ready to exec...
Definition: mem_dep_unit.hh:178
MemDepUnit::loadBarrierSNs
std::unordered_set< InstSeqNum > loadBarrierSNs
Sequence numbers of outstanding load barriers.
Definition: mem_dep_unit.hh:263

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