gem5
v20.1.0.0
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#include "arch/x86/x86_traits.hh"
#include "base/bitunion.hh"
#include "base/logging.hh"
#include "sim/core.hh"
Go to the source code of this file.
Namespaces | |
X86ISA | |
This is exposed globally, independent of the ISA. | |
Functions | |
X86ISA::BitUnion64 (X86IntReg) Bitfield< 63 | |
X86ISA::EndBitUnion (X86IntReg) enum IntRegIndex | |
static IntRegIndex | X86ISA::INTREG_MICRO (int index) |
static IntRegIndex | X86ISA::INTREG_IMPLICIT (int index) |
static IntRegIndex | X86ISA::INTREG_FOLDED (int index, int foldBit) |
Variables | |
X86ISA::R | |
SignedBitfield< 63, 0 > | X86ISA::SR |
Bitfield< 31, 0 > | X86ISA::E |
SignedBitfield< 31, 0 > | X86ISA::SE |
Bitfield< 15, 0 > | X86ISA::X |
SignedBitfield< 15, 0 > | X86ISA::SX |
Bitfield< 15, 8 > | X86ISA::H |
SignedBitfield< 15, 8 > | X86ISA::SH |
Bitfield< 7, 0 > | X86ISA::L |
SignedBitfield< 7, 0 > | X86ISA::SL |
static const IntRegIndex | X86ISA::IntFoldBit = (IntRegIndex)(1 << 6) |